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Entry type: Download Entry ID: 109474703, Entry date: 05/29/2017
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Download Operating System Updates V4.5H CPU412-3H / CPU414-4H / CPU414-4H PG / CPU417-4H

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Firmware download of the SIMATIC S7-400 H-CPUs V4.5

Firmware version S7-400 H-CPUs V4.5

This entry contains the firmware of the following S7-400 CPUs

CPU 412-3H PN/DP 6ES7 412-3HJ14-0AB0
CPU 414-4H PN/DP6ES7 414-4HM14-0AB0
CPU 416-4H PN/DP6ES7 414-4HR14-0AB0
CPU 417-4H PN/DP 6ES7 417-4HT14-0AB0

The current firmware of the S7-400 H-CPUs V4.5 is available at the end of the entry.

 

 

Description FW update firmware version V4.5.x

Updating firmware in RUN is possible as of this firmware version. An update is only possible from one version to the next, for example, from V4.5.5 to V4.5.6
For information, refer to the respective update description and the Fault-tolerant systems S7-400H system manual under "Updating the firmware without a memory card" and "Firmware update in RUN mode".

 

Description: Difference of the operating system update compared to the remaining S7-400 CPUs

After the actual firmware update, the self-test is started on the fault-tolerant system; this may take several minutes. This time depends on the load memory (size of the inserted memory card) and the configuration of the work memory.

 

 

Description of replacement scenario

Both CPUs must have the same firmware version in an S7-400H. If one CPU of your S7-400H fails, order a new CPU with the same order number. It will be delivered with the latest firmware version. This firmware version may be higher than the firmware version of the CPU being replaced. In this case, you must downgrade the new CPU to the older firmware version.

You have two options for the downgrade:

  1. using the memory card
    (see description …..)
  2. using the online functionality as described below:
  • Add the new CPU to your automation system.
  • Do not connect the fiber-optic cables yet.
  • Select this CPU in HW Config or in SIMATIC Manager.
  • Execute the menu command "PLC > Update firmware". The "Update firmware" dialog box opens. Here you select the firmware file with the same version as that of the previous CPU.
  • Upload this file to the CPU. The new CPU now has the same firmware version as the one it replaces.
  • Now connect the fiber-optic cables.
  • Transfer the system to the Redundant operating state by starting the CPU.

 

Description of the operating system update with a memory card

Requirements for creating an operating system update card:

  • S7 memory card
  • Flash 8 MB (order number 6ES7 952-1KP00-0AA0) or greater
  • STEP 7 with product version V3.1 or higher
  • Programming device or PC with external prommer for programming the memory card

 

Procedure for creating an operating system update card using STEP 7:

  • Download the required CPU file
  • Unzip the file with a double-click on the file name
  • Delete the memory card with: "File/Delete/S7 Memory Card" in Simatic Manager.
  • Program the operating system by selecting the following in Simatic Manager: "PLC/Update AS OS", select the target directory and start the programming process by opening the file CPU_HD.UPD.
  • The operating system update card is programmed when the standard mouse pointer appears again.

 

General procedure for an operating system update:

  • Power OFF at the power supply (PS) of the rack in which the CPU is installed.
  • Insert the prepared operating system update card into the CPU.
  • Power ON at the power supply of the rack in which the CPU is installed.
  • The operating system is transferred from the memory card to the internal FLASH EPROM.
  • During this transfer, all the LEDs on the CPU are lit (INTF, EXTF, FRCE, CRST, RUN, STOP). The operating system update takes about 2 minutes and is completed when the STOP LED on the CPU flashes slowly => memory reset request from the system.
    NOTICE:
    The self-test is started immediately after the update and can take several minutes, depending on the memory configuration.
  • Power OFF at the power supply and possible insertion of the memory card intended for the operation.
  • Power ON at the power supply.
    The CPU automatically performs a memory reset and is then operational immediately.
  • Set the time after the successful operating system update.

 

 

Description of the operating system update in RUN

As a general rule, any firmware update in RUN can only be from one firmware version to the next higher firmware version. A downgrade is not possible in RUN. See also the notes on the respective version-specific description.

Procedure for automatic firmware update:

Initial situation: Both CPUs are in redundant operation. Redundant operation

  1. For CPU access protection with password: Select a CPU of the fault-tolerant system in SIMATIC Manager and select the menu command PLC > Access authorization > Setup. Enter the CPU access password.
  2. Select one of the two CPUs either via Simatic Manager -> Project or HW Config. Do not use the menu command "Accessible nodes" in Simatic Manager.
  3. Select the menu command "PLC > Update firmware"
    A wizard is started that can automatically update the firmware on both CPUs.

The complete update description and alternative solutions are described in the Fault-tolerant S7-400 H Systems system manual under "Firmware update in RUN mode".

 

 

 

 

Download

 

Download V4.5.0: (backup only - 21.09.07)

Start of delivery of the new S7-400 H-CPUs
For more information, see 25912888

Product information: a5e01368340_01.pdf (46.0 KB)

Files for firmware version

MLFB
V4.5.0
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v450.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v450.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v450.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v450.exe (1.4 MB)

 

 

 

 

V4.5.1

 

Download V4.5.1: (backup only - 11.04.08)

The following corrections were made in firmware version 4.5.1:

  • The defect with event ID #4550 8F37 could occur during forcing. See also 28662081
  • With F-application and use of the last 32 data blocks from the CPU-type specific range, the coupling/update sequence was aborted.
  • When disconnecting a switched slave with more than 32 bytes of consistent user data which is connected via CP443-5, it could happen that the respective input values in the process image were not deleted.

Product information: a5e01368340_02.pdf (48.9 KB)
Product information: a5e01407763_02.pdf (43.2 KB)

Note on updating firmware in RUN:
You can update firmware in RUN when you are only using data blocks from the following range in your application:

  • CPU412-3H: 1 - 4063
  • CPU414-4H: 1 - 4063
  • CPU417-4H: 1- 8159
  • CPU414-4H PG: 1- 8159

Otherwise, update the firmware in STOP.

Important note regarding STEP 7 version in use

  • STEP 7 V5.4 SP3 or higher: (PCS7 V7.0 SP1) In HW Config, execute: "PLC > Update firmware".
  • STEP7 V5.3 SP2 or higher up to and including STEP 7 V5.4 SP2 (PCS 7 V6.1 SP1+SP2 and V7.0): Before you update the firmware, set the required CPU to STOP with SIMATIC Manager "PLC -> Operating state". The "Update firmware" can then be executed via HW Config.
    Warning: If you use "PLC > Update firmware" with these STEP 7 versions first from HW Config, both CPUs change to STOP.

Files for firmware version

MLFB
V4.5.1
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v451.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v451.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v451.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v451.exe (1.4 MB)

 

 

 

 

V4.5.2

 

Download V4.5.2: (backup only - 19.01.09)

Version 4.5.2 includes the following corrections:

  • Monitoring tag in H-CPUs V4.5 could result in a failure of the fault-tolerant system
    (see also 32619422).
  • Removal of the redundantly connected AO HART module (332-8TF01) was not detected correctly.
  • Inserting a module in a switched DP station that can only be reached from one end was not detected correctly.
  • After connection termination with protocol error of S7 connections or fault-tolerant S7 connections, there were some rare cases in which the fault-tolerant system failed with event ID 16#4550 AD03 9A04 0210.

Product information: a5e01368340_03.pdf (45.9 KB)
Product information: a5e01407763_03.pdf (37.0 KB)

Note on updating firmware in RUN:
Firmware update is possible in RUN when updating from firmware version V4.5.1 to version V4.5.2.

Caution!
After a firmware update in RUN from version V4.5.1 to version V4.5.2 and subsequent download of communication instances (data blocks for communication and alarm functions) for PCS 7: Delta download, a one-sided CPU defect with ID 4535:1242 can sporadically result.

Recommendation for affected users
You can prevent this behavior as follows:

  • After "Firmware upgrade in Run" to V4.5.2, continue upgrading immediately to V4.5.3. Do not perform a delta download/reload of blocks based on V4.5.2.
  • Do not use firmware update in RUN to version V4.5.2.
  • If the firmware update in RUN to version V4.5.2 still has to be performed:
    First execute "Update firmware in RUN" completely and without interruptions; both CPUs are in redundant operating state with firmware version V4.5.2.
    Then:
    1. Set master CPU to STOP (identifiable by MSTR LED being lit)
    2. Perform a memory reset of this CPU
    3. Next set this CPU to RUN; coupling and updating are performed
    4. Both CPUs are in redundant operating state
  • If the firmware update in RUN to version V4.5.2 has already taken place:
    1. Set one of the CPUs to STOP
    2. Perform a memory reset of this CPU
    3. Then set this CPU to RUN; coupling and updating are performed
    4. Both CPUs are in redundant operating state
    5. Perform steps 1 to 3 for the other CPU
    6. Both CPUs are in redundant operating state

 

Files for firmware version

MLFB
V4.5.2
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v452.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v452.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v452.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v452.exe (1.4 MB)

 

 

 

 

V4.5.3

 

Download V4.5.3: (backup only - 05.02.10)

Version 4.5.3 includes the following corrections:

  • After a firmware update in RUN from version V4.5.1 to version V4.5.2 and subsequent download of communication instances (data blocks for communication and alarm functions) for PCS7 delta download, you could encounter a one-sided CPU defect with identification 4535:1242. See also: 40240573
    (internal ref. AP00905594)
  • When using the same event ID of the archive function SFB37 "Send archive data" and an alarm block, for example, ALARM8P, an update of the messages by an OS could have resulted in a defect with event ID 16# 4535 1224
    (internal ref. AP00902830).
  • After a parameter change with "System change during operation" of a DO module that:
  • is connected in distributed I/O
  • and to the integrated DP interface of the CPU, the outputs were no longer controlled
    (internal ref. AP00898006)
  • In rare cases when monitoring I/O direct access commands (e.g. L PIB), there could be a failure of the fault-tolerant system with event ID 16# 4520 F89D C450 811D
    (internal ref. AP00832024)
  • If the diagnostic buffer of this slave was opened in a unilaterally configured slave from HW Config, it resulted in a synchronization error
    (internal ref. AP00788952)
  • During status or modify of a DB with a number greater than the permitted value range of the CPU, a defect or failure of the fault-tolerant system could occur
    (internal ref. AP00868740)
  • If the supply voltage is switched on unilaterally at a switched-off Y-link, a synchronization error could be triggered in some rare cases
    (internal ref. AP00874701)

Product information: a5e01368340-05.pdf (61.7 KB)
Product information: a5e01407763-05.pdf (51.7 KB)

Note on updating firmware in RUN:
Firmware update is possible in RUN when updating from firmware version V4.5.2 to version V4.5.3.

 

Files for firmware version

MLFB
V4.5.3
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v453.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v453.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v453.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v453.exe (1.4 MB)

 

 

 

 

V4.5.4

 

Download V4.5.4: (backup only- 28.01.11)

Version 4.5.4 includes the following corrections:

  • After opening the hardware configuration and transition to online view, a synchronization error could occur if the switched Profibus DP lines were operated in a slot gap between two external Profibus DP masters (e.g., CP443-5), and there was a Profibus DP master installed at one end that operated a unilateral line
    (internal ref. AP00964902)
  • After a power off and on of a fault-tolerant system, it was possible that the fault-tolerant system did not start up in redundant mode if a slave with modules with an odd number of bytes was configured at the integrated DP interface (internal ref. AP00993094)
  • Changing specific slaves (e.g. CP 341) by means of a system change during operation with CiR was not possible
    (internal ref. AP00789692)
  • For a DPV1 slave in which the parameter DPV1_Enable=0 is set in the GSD file, a DPV1_Request was sent in error
    (internal ref. AP00972147)
  • In case of contact problems on the memory module, the cause of the error could not be clearly assigned to the correct CPU and a failure of the fault-tolerant system could be triggered with event ID 16#4521 F8BF
    (internal ref. AP00793186)
  • The output Q of the SFB 5 "TOF" dropped to zero while the timer was running and there was a start with a new time period PT at start input IN
    (internal ref. AP00979279)
  • Sporadic differences in the contents of specific memory areas that previously resulted in the failure of the CPU with the event ID 16# 4550 8f37 or in the RAM/PIQ comparison error with event ID 16# 7322 are now detected, eliminated and signaled as CPU hardware faults via the OB84 (OB84_EV_CLASS B#16#35, OB84_FLT_ID B#16#83, accumulation of detected and corrected memory errors)
    (internal ref. AP01098300)

Product information: a5e01368340_07.pdf (93.6 KB)
Product information: a5e01407763-06.pdf (91.2 KB)

Note on updating firmware in RUN:
Firmware update is possible in RUN when updating from firmware version V4.5.3 to version V4.5.4.

Important note:
We recommend that you check the system status before you update the firmware in RUN. To do this, contact Customer Support.

Files for firmware version

MLFB
V4.5.4
CPU 412-3H DP6ES7 412-3HJ14-0AB0--
CPU 414-4H DP6ES7 414-4HM14-0AB0--
CPU 414-4H PG6ES7 414-4HR14-0AB0--
CPU 417-4H DP6ES7 417-4HT14-0AB0--

 

 

 

 

V4.5.5

 

Download V4.5.5: (backup only - 06.06.11)

Version 4.5.5 includes the following corrections:

  • There were some rare cases when there were inconsistencies in internal data structures and therefore a CPU defect with the following IDs, for example: 4550:AD90:1A02 or 4550:AA02:0B02 or 4550:AE90:0A01 or 4535:2824:0407 (internal ref. AP01177664)

Product information: a5e01368340_08.pdf (101.0 KB)
Product Information: a5e01407763_07.pdf (98.2 KB)

Note on updating firmware in RUN:
Firmware update is possible in RUN when updating from firmware version V4.5.4 to version V4.5.5.

During the firmware upgrade in RUN,

  • the outputs are not updated for about 1.5 seconds.
  • There is a pause of about 1.5 seconds in the data transfer in case of unilateral communication via CP443-1 and UDP protocol.

 

Files for firmware version

MLFB
V4.5.5
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v455.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v455.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v455.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v455.exe (1.4 MB)

 

 

 

 

V4.5.6

 

Download V4.5.6: (backup only - 16.05.12)

Version 4.5.6 includes the following corrections:

  • In rare cases, incorrect data could result after switchover with changed configuration (H-CiR) in a data block created with SFC 22 (CREAT_DB), if a switchover with changed operating system (operating system update in RUN) was performed beforehand
    (internal ref. AP01348864)
  • The defect with event ID 16#4550 A804 was eliminated
    (internal ref. AP01338820)
  • With simultaneous use of AR_SEND and SFBs for alarm generation (SFB 31-36), it could happen that alarms were no longer sent to the OS
    (internal ref. AP01250633 )
  • With unilateral communication via CP443-1 and UDP protocol, there could be a pause of about 1.5 seconds in the data transfer in versions V4.5.4 und V4.5.5 due to a switchover between master/reserve. This is always the case, for example, in a configuration change in Run or in case of a firmware upgrade
    (internal ref. AP01312555)
  • The outputs were not updated for about 1.5 seconds in versions V4.5.4 and V4.5.5 due to a switchover between master/reserve. This is always the case, for example, in a configuration change in Run or in case of a firmware upgrade
    (internal ref. AP01312555)
  • The system response in case of bit errors in the module memory (memory card) regarding event IDs 16#4531 FxBF 0006 and 16#4521 FxBF has been improved. Affected CPUs in single operation, in particular, now stay in RUN
    (internal ref. AP01281804)
  • After pulling and plugging a synchronization module, there could sporadically be an incorrect display of the module status in the STEP 7 HW Config online view as well as via the system status list information function (SFC51 Index 0x591)
    (internal ref. AP01298063)

Product information: a5e01368340-09.pdf (94.9 KB)
Product information: a5e01407763-08.pdf (91.5 KB)

 

Note on updating firmware in RUN:
Firmware update is possible in RUN when updating from firmware version V4.5.5 to version V4.5.6.

During the firmware upgrade in RUN,

  • the outputs are not updated for about 1.5 seconds.
  • There is a pause of about 1.5 seconds in the data transfer in case of unilateral communication via CP443-1 and UDP protocol.

 

Files for firmware version

MLFB
V4.5.6
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123hj14_v456.exe (1.4 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144hm14_v456.exe (1.4 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144hr14_v456.exe (1.4 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174ht14_v456.exe (1.4 MB)

 

 

 

 

V4.5.7

 

Download V4.5.7: (recommended for upgrading - 13.06.15)

Version 4.5.7 includes the following general corrections:

  • In case of a connection setup via PROFIBUS over FDL connection, after negative acknowledgment, there was a DEFECT (4550 with additional information: 420F) of the CPU
    (internal ref. 554726)
  • When reading out the system status list SSL ID= W#16#0195 of the DP system, the value zero was output rather than the system's own DP node number (DP ADDRESS)
    (internal ref. 550754)
  • With system functions SFC79 "SET" and SFC80 "RSET" (not relevant for PCS 7 users), an error was not signaled in case of a negative parameter N (number) when it should have been
    (internal ref. 551704)
  • System availability has been increased by expansion of the correction mechanisms in case of temporary internal inconsistencies. In redundant systems, an automatic resynchronization may thus be started in some rare cases
    (internal ref. 623965)
  • In connection with the reading of the system status list SSL ID= W#16#xx91 via system function SFC51 (RDSYSST) with a target range that was specified as too large, there were some rare cases when a DEFECT (4520 with additional information: 850D), loss of synchronization or an incorrect RETVAL could occur
    (internal ref. 550462)
  • If an incorrect address (via ANY pointer or Smart ANY pointer) is used during monitoring of tags by means of an operator control and monitoring system (e.g.: HMI or PCS 7 OS) with one-time or cyclic reading, there may be some rare cases when the CPU changes to DEFECT state (4550 with additional information: B090)
    (internal ref. 549333)
  • In very rare cases it could happen that with faulty configuration of the communication connection with SFB33 "ALARM" and SFB34 "ALARM_8" the CPU changed to the operating state DEFECT (4550 with additional information: B205) or there was a synchronization error in the case of a fault-tolerant system.
    (internal ref. 1127314)

The following improvements have been made, especially for redundant operation:

  • After a power failure in rack 0 of a fault-tolerant system with S7-400 expansion racks and simultaneous use of a CP443-1RX00 or CP442-1RX00, the CPU could change to the DEFECT operating state (4535 with additional information: FF4D). The CPU in rack 1 was not affected
    (internal ref. 550535)
  • During pulling and plugging of modules in a single-side I/O (the DP slave is only configured for one of the CPUs in the fault-tolerant system) connected by means of an external DP master (CP443-5DX..), in rare cases there could be a synchronization error in the fault-tolerant system
    (internal ref. 549183)
  • By expansion of the diagnostic functionality in connection with additional PROFIBUS CPs, the switchover time could be further reduced in some cases
    (internal ref. 936125)
  • With switched I/O that are connected by means of an external DP master (CP443-5DX05) and configured with a data consistency of >32 bytes, there could be in connection with bus faults on the active DP line (with line failure) a stop of the CPU or of the fault-tolerant system due to a "RAM comparison error"
    (internal ref. 550478)
  • After an interruption during the startup of the reserve CPU of a fault-tolerant system due to a power failure, it could happen in rare cases that the CPU changed to the DEFECT state (4520 with additional information: 8123). The still active master CPU was not affected
    (internal ref. 1102912)
  • If an interrupt was received by an internal DP interface during a master switchover (just when the reserve became the master), it could happen in some rare cases that this interrupt was not correctly evaluated by the CPU. The associated interrupt OB was not processed
    (internal ref. 1226205)
  • In very rare cases, an error search mode could occur after power was restored to the reserve CPU in the fault-tolerant system
    (internal ref. 553174)
  • A failure of the fault-tolerant system (DEFECT 4535 with additional information: F0EF) could occure in case of a specific and extremely rare error of the synchronization module (characterized by generation of many interrupts) and unfavorable system states 
    (internal ref. 549088)
  • In some very rare cases, with synchronization errors that occurred at the end of the firmware update procedure, there could be a transition to the DEFECT state (4550 with additional information: A203). If sporadic synchronization errors have occurred in the past, we recommend that you check or replace the synchronization connections prior to an update
    (internal ref. 1039600)
  • After extremely frequent disconnections of communication, it could happen in some very rare cases that the CPU changed to the DEFECT state (4535 with additional information: F8EE)
    (internal ref. 1184336)

Improvements which only affect single operation (1 of 1 operation):

  • When removing DP slaves from an external DP master in Run, in rare cases it could happen in single operation (1 of 1) that there was a change to the DEFECT state (4550 with additional information: F84D)   (internal ref. 828114)
Product information: A5E01368340-10.pdf (43.8 KB)
Product information: A5E01407763-09.pdf (39.5 KB)

 

Note on updating firmware in RUN:
Firmware update in RUN is only possible when updating from firmware version V4.5.6 to version V4.5.7.

Files for firmware version

MLFB
V4.5.7
CPU 412-3H DP6ES7 412-3HJ14-0AB0 4123HJ14_V457.exe (1.2 MB)
CPU 414-4H DP6ES7 414-4HM14-0AB0 4144HM14_V457.exe (1.2 MB)
CPU 414-4H PG6ES7 414-4HR14-0AB0 4144HR14_V457.exe (1.2 MB)
CPU 417-4H DP6ES7 417-4HT14-0AB0 4174HT14_V457.exe (1.2 MB)



 


Note when using a fail-safe program (May 2017):

When using a fail-safe program for more than 9 years without switching off the power supply, the CPU could switch to "Defect" operating state.

Power off/on can avoid this operating state.

 

 

 

Security information
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https://www.siemens.com/cybersecurity#Ouraspiration.