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Entry type: FAQ Entry ID: 17602317, Entry date: 01/08/2009
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Retentivity behavior of S7-300 CPU 31x and complete devices C7-6xx with MMC

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Description:
The retentivity behavior of the separate variables is important for developers when creating programs. Developers usually have variables in their programs, whose contents are to be retained even during POWER OFF (retentive) and other variables that then have to be reset to a defined value (non-retentive). In SIMATIC STEP 7 developers can therefore configure retentive address areas for data, markers, S7 timers and S7 counters which they can then use for retentive variables. This entry describes the retentivity behavior of the address areas of SIMATIC S7-300 CPUs and C7 devices with Micro Memory Card (MMC). The retentivity behavior of the address areas is described for the POWER OFF/ON change of status, the STOP/RUN operating mode and for overall reset.

The entry is divided into the following topics:

Conditions of the retentivity behavior

The retentivity behavior of the address areas depends on:

  • The CPU.
  • The parameterization in the HW Configuration.
  • The configuration ("Non-Retain" enabled/disabled) of each individual data block (the settings are not effective in all CPUs).

Retentivity with data blocks

STOP/RUN operating mode or POWER OFF/ON

  1. All the blocks in the load memory (MMC) are retained.
     
  2. With the S7-300 CPUs and the C7 devices that do not support the "Non-Retain" block property, the DBs are always retentive by default.
     
  3. With CPUs that support the "Non-Retain" block property you can set the retentivity behavior of each DB separately. 

    There requirement for this is that you make a setting in STEP 7 as from V5.2 +SP1 by:
    • Enabling/disabling the "Non-Retain" block property of the DB (see Table 01).
    • Creating a DB with SFC 82 "CREA-DBL". When you create a DB with SFC 82, in the DB's attributes it is defined in Bit 2 whether the DB is to be retentive or not.

    If the "Non-Retain" property of the data block is disabled, the data block is retentive.
    If the "Non-Retain" property of the data block is enabled, the data block is non-retentive.

Note:
With certain CPUs only part of the main memory can be used for retentive DBs. If the main memory for retentive data blocks is already full, then:

  • No more DBs are created by SFC 82 "CREA-DBL".
  • The error code W#16#80B2 (insufficient main memory) is returned via RET_VAL.

Information on how much main memory can be used for retentive data blocks in your CPU is available in the manual "S7-300 CPU 31xC and CPU 31x, Technical Data", Entry ID: 12996906, in chapters 6 and 7.

  1. If no MMC is slotted at POWER ON, the CPU automatically performs an overall reset. This procedure is independent of the CPU's previously set operating mode.

Overall reset (MRES)

  1. All the blocks in the load memory (MMC) are retained.
  2. The data is reset to the current value from the load memory. These are the last current values loaded from the PG into the CPU or written to the load memory by SFC84 or the STEP 7 function "Copy RAM to ROM...".

Note:
If it is necessary to save the current data, it must be saved on the MMC (load memory). You can use the SFC84 or the STEP 7 function "Copy RAM to ROM..." for this. Write access to the load memory should not be too frequent, because an MMC only permits 100,000 write accesses.

How to configure the retentivity behavior of data blocks (only for CPUs that support the "Non-Retain" property)

In S7-300 CPUs and C7 devices all the data blocks are preset to retentive. With CPUs that support the "Non-Retain" property you can change the retentivity behavior of each data block to non-retentive. The following table describes how to set the retentivity behavior of a data block.
 

No. Procedure
1 Mark the data block for which you wish to change the "Non-Retain" property. In the menu bar you select "Edit > Object Properties..." or press the key combination [Alt] + [Return]. This opens the data block's "Properties..." window.


Fig. 01
2 In the "Properties..." dialog you select the "General - Part 2" tab.


Fig. 02
3 When you enable the "Non-Retain" option, the data block is not retentive.


Fig. 03
Table 01

Warning:
The selection field for "Non-Retain" can be selected even if your CPU does not support the "Non-Retain" data block property, and has no affect in this case. Information on whether your CPU supports the "Non-Retain" data block property is available in the manual "S7-300 CPU 31xC and CPU 31x, Specifications", Entry ID 12996906, chapters 6 and 7, as well as in the product information A5E00830173-01 in the same manual.

Retentivity with markers, S7 timers and S7 counters

  • You can configure the retentive address areas of markers, S7 timers and S7 counters in "HW Config" as described in Table 01.
  • Operating mode STOP/RUN or POWER OFF/ON
    The marker, S7 timer and S7 counter address areas retain their values if they have been defined as retentive. Otherwise they lose their values and are initialized with "0".
  • Overall reset (MRES)
    The marker, S7 timer and S7 counter address areas are deleted with an overall reset regardless of whether they have been defined as retentive or non-retentive.
    If no MMC is slotted at POWER ON, the CPU automatically performs an overall reset. This procedure is independent of the CPU's previously set operating mode.

How to configure retentive address areas for markers, S7 timers and S7 counters in STEP 7

The following table describes how to proceed to configure retentive address areas in an S7-300 CPU.
 

No. Procedure
1 Open the Hardware Configuration of your S7-300 station.


Fig. 04
2 Double-click your CPU icon. Now the "Properties - CPU 31x ..." window opens. Select the "Retentive Memory" tab.


Fig. 05
3 In the "Retentive Memory" tab, in the "Retentivity" field you can configure the retentive address areas for:
  • Markers
  • S7 timers
  • S7 counters


Fig. 06
4 After configuring the desired retentive areas you can quit the CPU Properties dialog via "OK" or make changes in other tabs.
Table 02

Overall reset

The following table gives an overview of the overall reset procedures.
 

Overall reset with S7-300 CPUs and C7 devices with MMC
The following elements are deleted in the memory:
  • All markers
  • All S7 timers
  • All S7 counters
The following elements are retained:
  • Contents of the diagnostics buffer
  • Contents of the MMC (user program, ...)
  • Time
  • Status and value of the elapsed time counter

Behavior and functional sequences without MMC:

  • If no MMC is slotted at POWER ON, the CPU automatically performs an overall reset. This procedure is independent of the CPU's previously set operating mode.
  • Without MMC the original MPI interface parameters are retained.
  • Operation of the CPU without MMC is not possible. However, you can still read out the diagnostics buffer.
Functional sequences after overall reset with slotted MMC:
  • If you have an MMC inserted, following the overall reset the CPU copies the user program and the system parameters saved on the MMC to the main memory. With data blocks the current values are reloaded from the data blocks on the MMC.
    If there are no current values in these data blocks on the MMC, then the initial values are loaded from the load memory.
  • If an MMC is slotted, at startup the CPU checks whether the data on the MMC are valid for it. If this is the case, the program and the interface configuration are loaded and activated.
Important:
If you wish to communicate with the CPU (without MMC or with data invalid for the CPU) from your PG/PC after the overall reset, the only option you have for setting up this communication is via the MPI or MPI/DP or PROFINET (after node assignment) interface.
Table 03

Buffering the time
The following applies for all SIMATIC S7-300 CPUs* and C7 devices with Micro Memory Card (MMC):
  • At POWER OFF, the time is usually buffered for 6 weeks at an ambient temperature of 40 °C.
  • After the buffer duration, upon restart, the clock continues with the time at which the POWER OFF was made.
  • The runtime meter is retentive, but has to be restarted after each restart.
*This does not apply for CPU 312 and CPU 312C. After the buffer duration, upon restart, these continue with the time at which the POWER OFF was made.

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