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Entry type: Download, Entry ID: 18467424, Entry date: 02/20/2004
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Using the Integrated "Count" Function in the S7 CPU 31xC

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QUESTION:
Is there a sample program available for using the integrated counter in the S7 CPU 31xC?

ANSWER:
The integrated counter in the S7 CPU 31xC is controlled via the SFB 47 system function block. In addition to the inputs for controlling the counter, parameters (e.g. hysteresis, comparator value) can also be assigned to the counter via SFB 47, and the configured data can also be scanned via this block.

Parameters are assigned to the counter via a job (job number) and the associated value. The job is then activated. A new job or a new parameter can only be set or scanned when the previous job is processed. When a job is finished, this is indicated via the status register.

The function block (FB 1) which is provided here makes it much easier to assign parameters to the counter via SFB 47. The write and read jobs are initiated via initiation bits and are automatically reset once the job is complete. The status displays can be reset via a shared input.

The function block calls SFB 47 internally. The parameters which are required for calling SFB 47 can be derived from the call parameters for FB 1.

The following call interface is available via FB 1:

Input parameters

Type

Description

Module_address

WORD

I/O address of the counter module in hexadecimal form, as set in the HWCONFIG (default: W#16#300)

Channel_number

INT

Number of the channel used.
The number of channels available is dependent on the CPU

SW_Gate

BOOL

Controls the software gate

Enable_output

BOOL

Enables the output for manual control

Control_output

BOOL

Direct activation of the digital output

Output parameters

Type

Description

STS_Gate

BOOL

Internal gate status display

STS_Up

BOOL

Counting forwards

STS_Down

BOOL

Counting backwards

STS_Latch

BOOL

Latch input status display

STS_Hardware_gate

BOOL

Hardware gate status display

STS_Output

BOOL

Digital output status display

STS_Comparator

BOOL

Comparison criteria are or have been met (note the setting in the STEP 7 HWCONFIG)

STS_Overflow

BOOL

Overflow has occurred

STS_Underflow

BOOL

Underflow has occurred

STS_Zero_mark

BOOL

Zero-crossing has occurred

Counter_value

DINT

Current channel counter status

Latch_value

DINT

Current latch value (last measurement)

Job_error

BOOL

Error display in a read or write job

Error_number

WORD

Job error number (in "job error = 1")

Input / Output parameters

Type

Description

Reset_status

BOOL

Reset the status bits for comparator, zero-crossing, overflow and underflow

WR_Count_value

BOOL

"Write count value" job initiation

WR_Load_value

BOOL

"Write load value" job initiation

WR_Comparator_value

BOOL

"Write comparator value" job initiation

WR_Hysteresis

BOOL

"Write hysteresis" job initiation

WR_Pulse_width

BOOL

"Write pulse width" job initiation

WR_Job_value

DINT

Value for the current write job

RD_Load_value

BOOL

"Read current load value" job initiation

RD_Comparator_value

BOOL

"Read current comparator value" job initiation

RD_Hystersis

BOOL

"Read current hysteresis" job initiation

RD_Pulse_width

BOOL

"Read current pulse width" job initiation

RD_Read_value

DINT

Return value for the current read job

Table 1: FB1 interface description

Using the write and read jobs:
The write jobs are triggered via a "1" on the associated initiation bit (WR_). The value being written for the activated job is transferred at the "WR_Job_value" input. Once the write job has ended, the activation bit is reset again and the job value is defined as "0". Only one job value may be set at a time.

Read jobs are treated identically to write jobs. The job activation is set and is then reset again by the block once it is completed. The returned value is output at the "RD_Read_value" parameter.
The return value is designed as an input/output parameter so as to enable the value to be set to "0" by the calling program as well.

Resetting the status bits:
A "1" at the "Reset_Status" parameter serves to reset the status displays (e.g. overflow, underflow). Once all the status bits have been reset, the block also resets the active bit.

Error handling:
If an error occurs during a write and read job, the initiation bit is reset, and the "Job_error" bit is set. An error code is displayed at the "Error number" output to facilitate further diagnostics. This is dependent on the mode. The error code is identical to the error code that is output by SFB 47. In order to find out the meanings of the error codes, refer to the online help or to the manual mentioned below.
The job error and the error code are reset if a job is executed correctly.

Further information / Manuals:
"Programmable Logic Controller S7-300 CPU 31xC Technological Functions",
part of the documentation package, order no. 6ES7 398-8FA10-8AA, Entry ID 12429336

Download:
The attached download contains the STEP 7 project with the FB1 function block for calling SFB 47. The block is programmed and annotated in STL. However, there is no need to change the program code in the block for a typical application. The block can be used directly in the LAD/FBD/STL program. In addition, the only block that has to be loaded from the standard library is SFB 47.

FBCount31xC.exe ( 304 KB )

Copy the "FBCount31xC.exe" file into a separate folder and then start the file with a double-click. The STEP 7 project is extracted automatically and can then be opened or processed.

Runnability and test environment:
The sample program can be used on all the CPU models in the CPU 31xC compact series.
The following table lists the components which have been used to create this entry and verify the functions described:

Test environment

Version

PC platform

Pentium III, 800MHz, 260 MB main memory

PC operating system

Microsoft Windows XP V5.1 SP1

STEP 7

STEP 7 V5.2 SP1

Optional packages

-

S7-CPU

CPU 314C 2PtP (314-6BF00-0AB0)

Table 2: System requirements for the attached download



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