Operating system updates for CPU 1214C, COMPACT CPU, DC/DC/Relay
|S7-1200 CPU Firmware update process:
To install the CPU firmware update, follow these steps:
The user program and hardware configuration are not affected by the firmware update. When the CPU is powered up, the CPU enters the configured start-up state.
Overview of order no.’s and latest versions of the CPU 1214C, COMPACT CPU, DC/DC/Relay:
Upgrade by ...
|Recommended for upgrading:
214-1HE30-0XB0_V220.EXE ( 4547 KB )
|For backup only:
214-1HE30-0XB0_V212.EXE ( 4436 KB )
|For backup only:
214-1HE30-0XB0_V203.EXE ( 4452 KB )
|For backup only:
214-1HE30-0XB0_V200.EXE ( 4451 KB )
|For backup only:
214-1HE30-0XB0_V102.EXE ( 2861 KB )
|For backup only:
214-1HE30-0XB0_V101.EXE ( 2864 KB )
|For backup only:
214-1HE30-0XB0_V100.EXE ( 2862 KB )
Key features supported by S7-1200 CPU firmware V2.2.0 include:
- SCL (Structured Control Language)
- Download in RUN
New modules are available:
- CM 1243-2 AS-i Master
- CM 1241 RS422/485
- SM 1222 DQ8 RLY Changeover
Required software: STEP 7 V11 SP2 Basic or Professional.
Communication errors might occur on very fast computers between STEP 7 V11 SP2 and S7‑1200 CPUs versions 1.x through 2.1 Upgrade the CPU firmware to V2.2 to correct these issues
Key features supported by S7-1200 CPU firmware V2.1.2 include programming instructions for basic motion control V2.0.
Required software: STEP 7 V11 SP1 Basic or Professional
S7-1200 CPU firmware update V2.0.3 improves the security and robustness of the S7-1200 product family.
The S7-1200 CPU firmware update V2.0 provides the following enhancements:
- Changes in the behavior of a CPU with V2 firmware
- Certain S7-1200 modules require CPU V2 firmware
- Changes in the communication instructions
- Changes in the programming instructions
Changes in the behavior of a CPU with V2 firmware or STEP 7 V11
The V2 firmware update changes the functionality of the CPU.
· The V2 CPU now performs a warm restart on the first transition to RUN mode following a download from STEP 7 V11. The warm restart does not overwrite the data in the DBs. (A V1 CPU always performs a cold restart on the first transition to RUN mode following a download, which resets the DBs to the default values.) However, the following scenarios cause a V2 CPU to perform a cold restart following a download:
o Downloading a project from STEP 7 V10.5 to a V2 CPU
o Downloading a project that contains a V1 CPU from STEP 7 V11 to a V2 CPU
· If a run-time error occurs in the execution of a STEP 7 V11 user program, the CPU now stays in RUN mode. (This is a change in the default settings for the CPU properties for STEP 7 V11.)
· The first execution of a cyclic OB following a transition to RUN mode in a V2 CPU can occur in less than the configured time period, but will always occur by the configured time period. Every other execution of the cyclic OB occurs at the configured time period. (For a V1 CPU, the first execution of a cyclic OB always occurred at the configured time period following a transition to RUN mode.)
· The real time clock in a V2 CPU updates the system time more frequently to provide greater accuracy than a V1 CPU.
· The scan cycle for V2 CPU is calculated on multiples of 1 ms, which is the same as for a V1.0.2 CPU.
· Daylight saving time in a V2 CPU is now configured in local time instead of being configured in the system time.
· The default hardware compatibility mode in STEP 7 V11 is to allow "acceptable substitutions". (The default for STEP 7 V10.5 was to allow "any substitution".) You can change this setting in the device configuration for the CPU.
· The V2 CPU provides additional error-checking of the compiled user program. If an error is detected, the CPU now logs an error.
S7-1200 modules that require CPU V2.0 firmware
You can use certain S7-1200 modules only with a V2 CPU.
|Type of module||Description||Order Number|
|Signal board (SB)||SB 1231 AI 1x12 bit||6ES7 231-4HA30-0XB0|
|SB 1231 AI 1x16 bit TC||6ES7 231-5QA30-0XB0|
|SB 1231 AI 1x16 bit RTD||6ES7 231-5PA30-0XB0|
|Signal module (SM)||SM 1231 AI 8x16 bit TC||6ES7 231-5QF30-0XB0|
|SM 1231 AI 8x16 bit RTD||6ES7 231-5PF30-0XB0|
|SM 1223 8xAC / 8xRelay||6ES7 223-1QH30-0XB0|
|Communications board (CB)||CB 1241 RS485||6ES7 241-1CH30-1XB0|
|Communications module (CM)||CM 1243-5 PROFIBUS master||6GK7 243-5DX30-0XE0|
|CM 1242-5 PROFIBUS slave||6GK7 242-5DX30-0XE0|
|Communications processor (CP)||CP 1242-7 GPRS||6GK7 242-7KX30-0XE0|
Changes in the communication instructions
S7-1200 V2.0 supports PROFINET UDP
PROFINET UDP is now supported. UDP provides a broadcast capability. Use the UDP instructions (TUSEND and TURCV) with the PROFINET TCON and TDISCON instructions.
PROFINET instructions (TSEND_C, TRCV_C, TSEND, TRCV, TCON and TDISCON)
· TSEND, TRCV, TCON or TDISCON turns Done on for only 1 scan: In a V2 CPU, the Done output now turns on for only 1 scan. (This behavior now matches the execution of the TSEND_C and TRCV_C instructions in a V1 CPU or V2 CPU.)
· ENO for TSEND, TRCV, TCON and TDISCON: The V2 CPU will now set ENO = TRUE when the value of STATUS is 16#0001 to 16#7FFF ("busy" condition). If the value of STATUS is 16#8000 to 16#FFFF ("error" condition), ENO = FALSE. (The V1 CPU would set ENO = FALSE for both "busy" and "error" conditions.)
STATUS = 0 (for "completion without error") sets ENO = TRUE for either a V1 CPU or a V2 CPU.
· The V2 CPU performs additional checking of the lengths of the DATA parameter. Because certain error codes for the PROFINET instructions have been changed, consult the S7-1200 programmable controller system manual or the STEP 7 online help for specific error codes.
· For "ad hoc mode", the V2 CPU allows arrays of various data types, as with an S7-300 or S7-400 CPU.
If you store the data in an "optimized" DB (symbolic only), the V2 CPU supports only arrays of byte-length data: Byte, Char, USInt and SInt. (A CPU with V1.0.2 firmware allowed only arrays of Byte.)
Point-to-Point (PtP) instructions
· Done output is turned on for only 1 scan: In a V2 CPU, the Done output of a PtP instruction now turns on for only 1 scan.
· Transmission of String data: The V2 CPU now transmits only the String data itself and does not transmit the length fields. (A V1 CPU would transmit both the String data and the length fields.)
Changes in the programming instructions
There have been minor changes in the how the V2 CPU handles errors for the extended instructions:
· When a memory-range error is detected, V2 CPU now generates an entry in the diagnostics buffer.
· For any extended instruction that does not have an instance DB:
o An error with loading the input parameters will cause the instruction to not be executed.
o If an error occurs when the instruction is being executed, the outputs of the instruction are set to 0.
· Certain errors may generate different error codes for a V2 CPU. These changes are relatively minor, but you should refer to the 04/2011 release of the S7-1200 programmable controller system manual or the STEP 7 online help for the specific error codes generated by the extended instructions for a V2 CPU.
Compare instructions for Real and LReal values
For a comparison of two Real or LReal "not-a-number" (NaN) values, the result of the comparison will now be reported as equal, regardless of whether the values are the same NAN value or are different NaN values. The V2 CPU will now set the result = TRUE for the CMP==, CMP>=, and CMP<= instructions. (With a V1 CPU, this comparison would yield only a "not-equal" result, and only the CMP<> instruction would set the result = TRUE.)
· The V2 CPU now correctly handles the String operation if the In parameter (location for the input string) and Out parameter (location of the output string) are the same location or string.
· If the string parameters overlap but are not the same exact location, the V2 CPU now sets ENO = FALSE and does not perform the operation.
· The V2 CPU will now attempt to execute a String instruction that uses a string that has been corrupted by having the length fields overwritten with a 0. (For example, an incorrect memory location used by a Move instruction might have accidentally caused the string to have been completely or partially overwritten.) The V2 CPU does not generate an entry in the diagnostics buffer and sets the ENO accordingly. (A V1 CPU would have generated an entry in the diagnostics buffer and would have not executed the String instruction.)
Multiplex (MUX) instruction
The maximum number of inputs for a MUX instruction in a V2 CPU has been increased to 256 inputs. (The V1 CPU limited the MUX instruction to 32 inputs.)
General exponential (EXPT) instruction
The EXPT instruction was modified for the following calculations:
· 00 = 1
(IN1 = 0 and IN2 = 0, then OUT = 1)
· 01 = 0
(IN1 = 0 and IN2 = 1, then OUT = 0)
The S7-1200 CPU firmware update V1.0.2 addresses the following issues:
- PROFINET instructions are not restricted to cyclic OBs or the main program cycle
- Operation of the PROFINET instructions
- PROFINET TCP "Ad hoc mode"
- Setting for the communication is retained after a power cycle.
- New return code for the RD_LOC_T (Read Local Time) instruction
- CPU system time now correctly calculates the last-week-of-the-month
- Retaining timer values after either a power cycle or a transition from RUN to STOP to RUN
PROFINET instructions are not restricted to cyclic OBs or the main program cycle
You can now call the PROFINET instructions (such as TSEND_C or TRCV_C) from all OBs, including hardware interrupt OBs, time-delay interrupt OBs, cyclic interrupt OBs, error interrupt OBs, or startup OBs.
The restriction called out in section 6.2.5 "Open Ethernet communication" of the 11/2009 version of the S7-1200 System Manual concerning calling OBs is no longer valid.
Operation of the PROFINET instructions
The DONE, ERROR, and STATUS outputs of the PROFINET instructions (such as TSEND and TRCV) now follow the convention of the S7-300 and S7-400. These outputs are asserted (set to true or false) for one execution of the instruction, regardless of the state of the REQ parameter.
Previously, the REQ parameter had to be active until the DONE, ERROR, and STATUS outputs were asserted, and these outputs were all held active as long as REQ was true.
CPU firmware update V1.0.2 corrects this situation, allowing REQ to be pulsed and returned to a false state.
PROFINET TCP "Ad hoc mode"
"Ad hoc mode" for TCP is supported by the S7-1200. (The "Ad hoc mode" exists only with the TCP protocol variant.) Assign a value of "65535" to the LEN parameter to select "Ad hoc mode". With "Ad hoc mode", a maximum of 1472 bytes can be received.
This affects the descriptions of the TRCV_C and TRCV instructions in Section 6.2.5 "Open Ethernet communication" of the 11/2009 version of the S7-1200 System Manual.
Retaining the communication load setting after a power cycle
The CPU property for communication load is now correctly retained following a power cycle.
RD_LOC_T (Read Local Time) instruction
The RD_LOC_T instruction now includes a return code value to indicate whether the current local time is in daylight saving time or standard time.
- RET_VAL = W#16# 0000: The current local time is in standard time.
- RET_VAL = W#16# 0001: Daylight saving time has been configured, and the current local time is in daylight saving time.
Configuration of local time in the CPU
The CPU now correctly handles standard/daylight savings time changes which occur on the last occurrence of a particular day of the week. Previously, such changes were only handled correctly if the particular day-of-week occurred five times in the month.
Retaining timer values after a power cycle or a RUN-to-STOP-to-RUN transition
The CPU now preserves the timer data following either a power cycle or a transition from RUN to STOP to RUN. (The timer DB must have been specified as retentive.)
The retentive data in a Data Block (DB) can become corrupted after a S7-1200 CPU power cycle.
Prerequisite conditions to create the fault:
- You must have created at least one DB with the “Symbolic access only” attribute selected AND at least one DB with the “Symbolic access only” attribute deselected.
- And…you must have retentive memory assigned for both DB types.
- And…after the initial download of the program with the DBs, you must have modified the DB data and downloaded the program again.
Corrupted data in a DB can result in unexpected machine behavior or process operation. Unexpected machine behavior or process operation can cause death, serious injury or property damage.
Control devices can fail in an unsafe condition, resulting in unexpected operation of controlled equipment.
Such unexpected operations could result in death or serious injury to personnel, and/or damage to equipment. Use an emergency stop function, electromechanical overrides, or other redundant safeguards that are independent of the S7-1200.