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Entry type: Download Entry ID: 44442927, Entry date: 03/05/2019
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Firmware updates for CPU 319-3 PN/DP (6ES7318-3EL01-0AB0)

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Firmware updates for CPU 319-3 PN/DP (6ES7318-3EL01-0AB0)

Description:

When updating the firmware, always update to the latest version available for the product and its respective article number. The previous versions of the firmware are only intended as backup to allow a downgrade to the original version. Until now this is not known to have been necessary in any case.
The respective latest version of a CPU firmware is valid for all versions of that article number.

Please note:
During the firmware update the actual values will be lost. If you require them, please save these values before starting with the FW update with the function "Copy RAM to ROM...."


The update can either be performed via Micro Memory Card or online:

1. Micro Memory Card:

Requirements for creating an operating system update card:

  • Micro Memory Card with at least 8 MB storage capacity article number 6ES7953-8LP31-0AA0
  • STEP 7 V5.1 SP2 or higher
  • PC with external PROM programmer (6ES7 792-0AA00-0XA0) or FieldPG / PowerPG  for programming the Memory Card

Creating the operating system update card with STEP7:

  1. Download the desired CPU file
  2. Unpack the file by double-clicking the file name
  3. Delete the Micro Memory Card by executing: "File/S7 Memory Card/Delete" in Simatic Manager.
  4. Program the operating system by selecting "Hardware/update operating system" in SIMATIC Manager,
    then select the target directory and "open" the CPU_HD.UPD file to start the programming process.
  5. Programming of the operating system update card is completed when the message "The firmware update for the module with the order number 6ES7318-3EL01-0AB0 was transferred successfully to the S7 memory card" appears on the screen.

To update the operating system:

  1. Switch OFF the power supply (PS) of the rack in which the CPU is located 
  2. Isolate the PLC from the communication network
  3. Insert the prepared operating system update card into the CPU
  4. Switch ON the power supply (PS) for the rack in which the CPU is located
  5. The operating system is transferred from the Micro Memory Card to the internal CPU flash EPROM. during this process, all indicator LEDs on the CPU are lit (FRCE, RUN, STOP, SF, BF).
  6. The operating system update is completed after about 2 minutes and is indicated by slowly blinking STOP LED => prompt for overall reset by the system
  7. Switch OFF the power supply (PS) and insert the Micro Memory Card intended for operation.
  8. Switch ON the power supply; the CPU automatically performs an overall reset and is then immediately operational.
  9. Before connecting the PLC to the communication network again the clock must be synchronized.


2. Online:

Requirements:

  • An online update of the firmware is possible with STEP 7 V5.3 or higher.
  • The module in the station whose firmware is to be updated must be accessible online.
  • A MMC (Micro Memory Card) must be available in the module as buffer memory.
  • The unpacked files with the current firmware version must be present in the file system of your PG or PC.
    A folder must only contain the files of one firmware version.

To update the firmware:

  1. Start STEP 7 and switch to HW-Config.
  2. Open the station with the CPU to be updated.
  3. Earmark the CPU.
  4. Select the command "PLC > Update firmware". The command can only be activated, if the highlighted CPU supports the function "Update Firmware".
  5. In the dialog "Update Firmware" use the "Find" button to select the path to the firmware update files (*.UPD).
  6. Once you have selected a file, information about the module suitable for the file and the firmware version required is shown in the lower portion of the dialog "Update Firmwaree"
  7. Click on the "Execute" button. STEP 7 will check whether the selected file can be interpreted by the module; if the answer is positive, the file will be loaded into the CPU. If the operating mode of the CPU must be changed for this, you will be prompted via dialogs. The CPU will then autonomously perform the firmware update.
  8. Check with STEP 7 (read diagnostic buffer of the CPU), whether the CPU successfully starts up with the new firmware.

After the CPU has been subjected to an overall reset, the following values will be retained:

  • the parameters of the MPI interface (MPI address and highest MPI address)
  • the IP address of the CPU
  • the sub-network screen
  • the static SNMP parameters


Overview of article numbers and latest versions of the CPU 319-3 PN/DP:

Article Number

FW-
version

Upgrade with ...
6ES7318-3EL01-0AB0  
 V3.2.16

Third-party software - Licensing terms and copyright information

You can find the copyright information for third-party software contained in this product, particularly open source software, as well as applicable licensing terms of such third-party software in the file ReadMe_OSS_V3216.

Special information for resellers

The information and the license terms in the file ReadMe_OSS_V3216 must be passed on to the purchasing party to avoid license infringements by the reseller or purchasing party.

 Registrierung notwendig  ReadMe_OSS_V3216.zip (186,7 KB) 


Recommended for upgrade:
For a description, see below Update V3.2.16
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3216.ZIP (5,6 MB)
SHA-256 checksum (Information on SHA-256)
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3216.txt (1 KB) 

 V3.2.14

Third-party software - Licensing terms and copyright information

You can find the copyright information for third-party software contained in this product, particularly open source software, as well as applicable licensing terms of such third-party software in the Readme_OSS_V3x14 file.

Special information for resellers

The information and the license terms in the Readme_OSS_V3x14 file must be passed on to the purchasing party to avoid license infringements by the reseller or purchasing party.

 Registrierung notwendig  ReadMe_OSS_V3x14.pdf (281,2 KB)


Backup only:
For a description, see below Update V3.2.14
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3214.ZIP (5,6 MB)

SHA-256 checksum (Information on SHA-256)
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3214.txt (1 KB)

 V3.2.13Backup only:
For a description, see below Update V3.2.13
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3213.ZIP (5,6 MB) 
 V3.2.12Backup only:
For a description, see below Update V3.2.12
 Registrierung notwendig  6ES7318-3EL01-0AB0_V3212.ZIP (5,6 MB) 
 

V3.2.11

Backup only:
For a description, see below Update V3.2.11
 Registrierung notwendig  3183EL01_V3211.EXE (5,7 MB) 

 

V3.2.10

Backup only:
For a description, see below Update V3.2.10
 Registrierung notwendig  3183EL01_V3210.EXE (5,9 MB) 

 

V3.2.8

Backup only:
For a description, see below Update V3.2.8
 Registrierung notwendig  3183EL01_V328.EXE (5,8 MB) 

 

V3.2.7

Backup only:
For a description, see below Update V3.2.7
 Registrierung notwendig  3183EL01_V327.EXE (5,8 MB) 

 

V3.2.6

Backup only:
For a description, see below Update V3.2.6
 Registrierung notwendig  3183EL01_V326.EXE (5,8 MB) 

 

V3.2.4

Backup only:
For a description, see below Update V3.2.4
 Registrierung notwendig  3183EL01_V324.EXE (5,8 MB) 

 

V3.2.1

Backup only:
For a description, see below Update V3.2.1
 Registrierung notwendig  3183EL01_V321.EXE (5,8 MB)


Update V3.2.16 (6ES7 318-3EL01-0AB0)

Note on dependencies to STEP7 and upwards compatibility:
STEP7 V5.5 or higher is required to configure these CPUs. When using the TIA Portal, you should use V12 or higher.
iMap V3.0 SP1 or higher is required to configure the CBA.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

Firmware V3.2.16 contains the following fault rectifications:

  • If the module was in the exceptional "Defect mode" during the projected DP mode of the multipoint interface (MPI/DP),
    the distributed I/O switched to the module sometimes continued to work with the last transferred state.
    This behavior has been corrected so that the I/O states defined by the user are set.


New function with firmware V3.2.16 for S7-300 and ET 200 CPUs with PROFINET interface:

  • The SNMP interface can be activated/deactivated via the DS 0xB071 write data record.

    Structure of data record 0xB071:
    Byte Element Code Explanation 
    0-1Block-IDF003HHeader
    2-3BlockLength8The data record length
    is from byte 4 "Version" 
    4-5Version0100H-
    6-7Reserved--
    8-11SnmpControlDisable/enable SNMP0 to disable SNMP
     

     


The following changes are effective with FW update V3.2.16:

  • There are no more sporadic CPU connection interruptions, for example when reading data records using the HMI service. This is because 0x80Cx is no longer automatically repeated in the case of temporary (data record) error messages and the return value is reported back directly to the client.
  • The module status of DP slave slot 2 is displayed correctly in the online view in STEP 7.
  • The stability of the status block environment has been enhanced.


Update V3.2.14 (6ES7 318-3EL01-0AB0)

CPU Version V3.2.14 does not include any functional improvements.

Note on dependencies to STEP7 and upwards compatibility:
STEP7 V5.5 or higher is required to configure these CPUs. When using the TIA Portal, you should use V12 or higher.
iMap V3.0 SP1 or higher is required to configure the CBA.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

The following changes become effective with firmware update V3.2.14: 

  • The setup of secure connections via https:// is no longer rejected with a message with new browser versions.
  • After a runtime of more than 7 weeks of the CPU, login problems involving the web server with user-defined websites no longer occur sporadically.
  • With unprotected Ethernet connections, modified telegram headers or DCP packets (e.g. a DCP IDENT request) with the maximum number of individual jobs can no longer trigger the defect Z1 = F015 when the PN role is set to IOC.


Update V3.2.13 (6ES7 318-3EL01-0AB0)

CPU Version V3.2.13 does not include any functional improvements.

Note on dependencies to STEP7 and upwards compatibility:
STEP7 V5.5 or higher is required to configure these CPUs. When using the TIA Portal, you should use V12 or higher.
iMap V3.0 SP1 or higher is required to configure the CBA.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

The following changes become effective with Firmware Update V3.2.13:

  • In case of an alarm flood, the defect with Z1=8022 no longer occurs if many HMI devices, which have registered for alarm S/Q messages, are operated on the CPU.
  • A ping request from another subnetwork is lo longer rejected if the device section of the "Sender IP address“ corresponds to the broadcast address of the CPU subnet.
    If, for example, the device sending the ping has the IP address 145.34.0.127 and the device receiving the ping has e.g. the IP address 192.168.0.10 and subnet mask: 255.255.255.128 -> Broadcast address: 192.168.0.127


Update V3.2.12 (6ES7 318-3EL01-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
STEP7 V5.5 or higher is required for configuration of these CPUs. When using the TIA Portal, V12 or higher should be used, where possible.
iMap V3.0 SP1 or higher is required for the CBA configuration.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

The firmware update V3.2.12 provides the following corrections:

  • After a CLR instruction, set and reset commands no longer sporadically result in the setting or resetting of bit operands.
  • When monitoring logic operations sequences with an “O” instruction (Or), RLO views no longer change.
  • Connection interruptions with online functions will no longer sporadically result in the defect with Z1=F012.
  • For acyclic data exchange with the SFBs 52 and 53 in case of a high communication load the defect status with Z1=E800 is no longer occasionally triggered, instead the temporary RetVal 80C3 is signaled at the SFC.
  • Time synchronization of the master no longer leads to isolated cases of defects with Z1= F012 or Z1=8392.
  • Following a memory reset request, for example, because a project which does not match the CPU is saved on the MMC, formatting of the MMC through switch operation now functions again as described in the manual.
  • Page update on the web server has been speeded up.


Update V3.2.11 (6ES7 318-3EL01-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
To be able to configure this CPU your require STEP7 V5.5 or higher.
For the CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions are compatible with later releases.

 

The new firmware version V3.2.11 provides the following corrections:

  • When monitoring blocks online with the calls and path specification of a block already opened for monitoring, the previously occurring defect with Z1=4305 will be prevented and a negative checkback signal generated instead.


Update V3.2.10 (6ES7 318-3EL01-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For the CBA configuration you require iMap V3.0 +SP1 or higher. Configurations with earlier STEP7 and iMap versions are compatible with later releases.

The new firmware version provides the following corrections:

  • In the case of a message buffer dump with a large number of transmission messages that would lead to an abortion of the message dump by the connection partner, e.g. because of lack of memory space, the connections will no longer get hooked up and a Defect with Z1=98C6 will no longer occur.
  • The retentivity backup in the case of power off/on has been stabilized, so that the previously occuring very sporadic Defect with Z1=F00F no longer occurs.
  • With TIA version V11 the loading of blocks which contain an ANY-Pointer with length 0 will no longer lead to Defect of the CPU with Z1=F012..
  • During online monitoring of several blocks with TIA version V12 the previously occuring Defect with Z1=7141 after the third block is now prevented; instead, a negative checkback will be generated.
  • An abortion of the communication connection during Block Status could previously cause the sporadic Defect with Z1=F004. Connection monitoring has now been improved.
  • Rapid successive calls of the SFB 52 (reading of data records) will no longer cause the sporadic Defect with Z1=E801.
  • Repeated loading of the user program on MMC with a simultaneously open topology display will no longer cause the Defect with Z1=F014.
  • Disturbances on the line during job reception from a connection partner will no longer cause the sporadic Defect with Z1=700A.
  • When calling several SFCs13 "Read Standard Diagnostics" the analog I/Os of correctly connected slaves will no longer supply the incorrect diagnosis "Wire Break".
  • During the startup of iDevices with update times set to  > 64 ms, e.g. because of a WLAN line, the login process will no longer sporadically leave some devices out, resulting in a blockage to the plant controller connection.
  • The use of Opera 15.0 or iOS5 with the web server no longer leads to representation errors or a curtailed display of the diagnostic buffer entries. The accessibility with the HTTPS setting has been stabilized.
  • In the case of L, T combinations with memory-indirect or AR addressing the Accu1-High will no longer be sporadically corrupted in the case of a double-word access.

Update V3.2.8 (6ES7 318-3EL01-0AB0)

The above CPU version contains no new functions.

Note on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions can be used with upward compatibility.

  Firmware update V3.2.8 provides the following corrections:

  • COS values of very small numbers (>=0 and <3.8518597E-34) are now output correctly with value 1.
  • AUF DB/DI indirect no longer causes sporadic opening of an incorrect DB.
  • In the case of a block upload or download the CPU will no longer sporadically go to Defect with Z1=F01A.
  • Communication abortions while the communications functions are running will no longer sporadically lead to Defect with Z1=F012.
  • In the case of block calls of the SFCs 82..84 with REQ=0 (RET_VAL=7000), BUSY will not be signaled with TRUE anymore.
  • The accuracy of the square root calculation "SQRT" has been improved. 

Update V3.2.7 (6ES7 318-3EL01-0AB0)

This firmware version contains the following new features:

  • SFC 109 PROTECT: new mode 12, with which protection level 3 can be activated via user program without password legitimation (even with a password it is now impossible to read/write access the CPU)
    see also Product Information at entry ID 61757603

Note on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions can be used with upward compatibility.

 Firmware update V3.2.7 provides the following corrections:

  • To prevent loss of retentivity with event ID 16# 4580 resp. event ID 16# 6523, the MMC connection in the case of power off/on has been optimized.
  • If the SFC 23 DEL_DB is used and a DB does not exist, defect Z1=F833 will no longer occur.
  • In the case of synchronization errors that cause a STOP of the CPU, defect Z1=F004 will no longer occur highly sporadically.
  • The abortion of a block transfer will no longer lead to a sporadic defect Z1=4131.
  • Connections of the CPU to a PLC link device will now be cut completely in the case of a connection abortion.
  • If clock flags are used, the three adjacent flag byte addresses are no longer influenced anymore.
  • Uploading of blocks to programming devices has been performance optimized.
  • Hardware releases (with boot loader A25.7.5 and below) now always permit the loading of blocks that were encrypted with Block Privacy.
  • Specific resources have been increased to ensure that Web-server accesses in the case of storm attacks remain operable.
  • If I-Devices have been configured with sub-module lengths of more than 32 Bytes, OB61 clock pulses will no longer be inaccurate or fail altogether.
  • If programs have been created with SCL, TSEND or TRECV blocks on which send or receive buffer lenghts have been declared as STRING, will no longer cause RET_VAL  807F.
  • Upstream switches that do not support LLDP will no longer cause a defect with Z1=8005 if there are several adjacent modules.
  • Multiple bit logical interconnections that concern the same byte will now be executed correctly.
  • After connection breaks with the Open-User communication there will be no more highly sporadic defect with Z1=E801.

Update V3.2.6 (6ES7 318-3EL01-0AB0)

The above new CPU version does not contain any new functions.

Note on STEP7 dependencies and upward compatibility:
To run this CPU you require STEP7 V5.5 or higher.
For CBA configuration you require iMap V3.0 +SP1 or higher. Configurations with earlier STEP7 and iMap versions can be used with upward compatibility.

Firmware update V3.2.6 provides the following corrections:

  • Modules that have run for approx. 500 days will no longer get stuck sporadically or show endlessly running retentive configured timers.
  • Cache errors that cannot be corrected and very sporadically occur during CPU startup will now be entered in the diagnostic buffer with defect identifier Z1= F001 and branched to "Defect" status. During startup the CPU can no longer enter a inconsistent state which is sporadically entered in the diagnostic buffer with event ID 16# 4580 (inconsistent backup buffer content).

Update V3.2.4 (6ES7 318-3EL01-0AB0)

The above new CPU version contains no new functions.

Note on STEP7 dependencies and upward compatibility:
To run this CPU you require STEP7 Version V5.5 or higher. For CBA configuration you require SIMATIC iMap Version V3.0 SP1 or higher.
Configurations with earlier STEP7 and iMap versions are upwardly compatible.

Firmware update V3.2.4 provides the following corrections:

  • No more sporadical loss of actual values after power OFF due to a request for overall reset because of a memory replacement (event ID 16# 6526)
  • The retentivity backup for power OFF has been stabilized (concerns highly sporadical loss of retentivity with event ID 16# 4580 "Backup buffer content inconsistent").
  • If a slave has been activated with the SFC12 and subsequently fails, the identifier for an I/O access error will not sporadically remain set when the slave returns during a transition from STOP to STARTUP (e.g. during startup of the CPU).
  • When reading the data of an I slave by means of SFC14, the error code 80A0 "An access error was found when accessing the I/Os" will no longer come up if the I slave has several subslots on one slot.
  • When a device fails, the inputs of the device which are stored in the process I/O image of the controller, will not sporadically fail to be set to 0.
  • In the case of a large number of simultaneous events on the DP line (station failures and returns, diagnosis, etc.), a highly sporadical Defekt Z1=E802 will no longer occur.
  • A SDB0 with invalid baud rate will no longer lead to a defect with Z1=914A; instead, the MPI default baud rate of 187.5 kBd will now be preset.

Update V3.2.1 (6ES7318-3EL01-0AB0)

The above new CPU version contains several new functional features; they are described in the delivery release at entry ID 44029417.

Note on STEP7 dependencies and upward compatibility:
To run this CPU you require STEP7 Version V5.5 or higher.
For CBA configuration you require SIMATIC iMap Version V3.0 SP1 or higher.

Configurations with earlier STEP7 and iMap versions are upwardly compatible.


Security information
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https://www.siemens.com/cybersecurity#Ouraspiration.