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Entry type: Download Entry ID: 62612775, Entry date: 12/18/2018
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Firmware updates for IM151-7 F-CPU (6ES7151-7FA21-0AB0)

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Firmware updates for IM151-7 F-CPU (6ES7151-7FA21-0AB0)

Description:

When updating the firmware, always update to the latest version available for the product and its respective article number. The previous versions of the firmware are only intended as backup to allow a downgrade to the original version. Until now this is not known to have been necessary in any case.
The respective latest version of a CPU firmware is valid for all versions of that article number.

Please note:
During the firmware update the actual values will be lost. If you require them, please save these values before starting with the FW update with the function "Copy RAM to ROM...."


The update can either be performed via Micro Memory Card or online:

1. Micro Memory Card:

Requirements for creating an operating system update card:

  • Micro Memory Card with at least 4 MB storage capacity, article number 6ES7953-8LM31-0AA0
  • STEP 7 SP2 or higher
  • PC with external PROM programmer 6ES7792-0AA00-0XA0 or FieldPG for programming the Memory Card.

Creating the operating system update card with STEP7:

  1. Download the desired CPU file
  2. Unpack the file by double-clicking the file name
  3. Delete the Micro Memory Card by executing: "File/S7 Memory Card/Delete" in Simatic Manager.
  4. Program the operating system by selecting "Update target system/operating system" in SIMATIC Manager,
    then select the target directory and "open" the CPU_HD.UPD file to start the programming process.
  5. Programming of the operating system update card is completed when the message "The firmware update for the module with the article number 6ES7151-7FA21-0AB0 was transferred successfully to the S7 memory card" appears on the screen.

To update the operating system:

  1. Switch OFF the power supply (PS) of the rack in which the CPU is located 
  2. Isolate the PLC from the communication network
  3. Insert the prepared operating system update card into the CPU
  4. Switch ON the power supply (PS) for the rack in which the CPU is located
  5. The operating system is transferred from the Micro Memory Card to the internal CPU flash EPROM. during this process, all indicator LEDs on the CPU are lit (FRCE, RUN, STOP, SF, BF).
  6. The operating system update is completed after about 2 minutes and is indicated by slowly blinking STOP LED => prompt for overall reset by the system
  7. Switch OFF the power supply (PS) and insert the Micro Memory Card intended for operation.
  8. Switch ON the power supply; the CPU automatically performs an overall reset and is then immediately operational.
  9. Before connecting the PLC to the communication network again the clock must be synchronized.

2. Online:

Requirements:

  • An online update of the firmware is possible with STEP 7 V5.3 or higher3.
  • The module in the station whose firmware is to be updated must be accessible online.
  • A MMC (Micro Memory Card) must be available in the module as buffer memor.
  • The unpacked files with the current firmware version must be present in the file system of your PG or PC:

BG_ABL.UPD
CPU_HD.UPD
KOMP_1.UPD

A folder must only contain the files of one firmware version.

To update the firmware:

  1. Start STEP 7 and switch to HW-Config.
  2. Open the station with the CPU to be updated.
  3. Earmark the CPU.
  4. Select the command "PLC > Update firmware". The command can only be activated, if the highlighted CPU supports the function "Update Firmware".
  5. In the dialog "Update Firmware" use the "Find" button to select the path to the firmware update files (*.UPD).
  6. Once you have selected a file, information about the module suitable for the file and the firmware version required is shown in the lower portion of the dialog "Update Firmwaree"
  7. Click on the "Execute" button. STEP 7 will check whether the selected file can be interpreted by the module; if the answer is positive, the file will be loaded into the CPU. If the operating mode of the CPU must be changed for this, you will be prompted via dialogs. The CPU will then autonomously perform the firmware update.
  8. Check with STEP 7 (read diagnostic buffer of the CPU), whether the CPU successfully starts up with the new firmware.

Overview of article numbers and latest versions of the IM151-7 F-CPU:

Article Number

FW-
version

Upgrade with ...
6ES7151-7FA21-0AB0  
 V3.3.16

Third-party software - Licensing terms and copyright information

You can find the copyright information for third-party software contained in this product, particularly open source software, as well as applicable licensing terms of such third-party software in the file ReadMe_OSS_V3316.

Special information for resellers

The information and the license terms in the file ReadMe_OSS_V3316 must be passed on to the purchasing party to avoid license infringements by the reseller or purchasing party.

 Registrierung notwendig  ReadMe_OSS_V3316.zip (186,8 KB) 


Recommended for upgrade:
For a description, see below Update V3.3.16
 Registrierung notwendig  6ES7151-7FA21-0AB0_V3316.ZIP (2,7 MB)
SHA-256 checksum (Information on SHA-256)
 Registrierung notwendig  6ES7151-7FA21-0AB0_V3316.txt (1 KB) 

 V3.3.12Backup only:
For a description, see below Update V3.3.12
 Registrierung notwendig  6ES7151-7FA21-0AB0_V3312.ZIP (2,7 MB) 
 

V3.3.11

Backup only:
For a description, see below Update V3.3.11
 Registrierung notwendig  1517FA21_V3311.EXE (2,8 MB) 

 

V3.3.10

Backup only:
For a description, see below Update V3.3.10
 Registrierung notwendig  1517FA21_V3310.EXE (2,9 MB) 

 

V3.3.8

Backup only:
For a description, see below Update V3.3.8
 Registrierung notwendig  1517FA21_V338.EXE (2,9 MB) 

 

V3.3.7

Backup only:
For a description, see below Update V3.3.7
 Registrierung notwendig  1517FA21_V337.EXE (2,8 MB) 

.

V3.3.2

Backup only:
 Registrierung notwendig  1517FA21_V332.EXE (2,8 MB) 


Update V3.3.16 (6ES7151-7FA21-0AB0)

The CPU version named above does not contain any functional innovations.

Information on STEP7 dependencies and upward compatibility:
STEP7 V5.5 SP4 or higher is required for configuration of these CPUs. When using the TIA Portal, V12 or higher should be used, where possible.
iMap V3.0 SP1 or higher is required for the CBA configuration.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

Distributed Safety:
For failsafe applications you require the option package S7 Distributed Safety V5.4 SP1 or higher.

The following changes are effective with FW update V3.3.16:

  • There are no more sporadic CPU connection interruptions, for example when reading data records using the HMI service. This is because 0x80Cx is no longer automatically repeated in the case of temporary (data record) error messages and the return value is reported back directly to the client.
  • The module status of DP slave slot 2 is displayed correctly in the online view in STEP 7.
  • The stability of the status block environment has been enhanced.


Update V3.3.12 (6ES7151-7FA21-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
STEP7 V5.5 + Service Pack 4 or higher is required for configuration of these CPUs. When using the TIA Portal, V12 or higher should be used, where possible.
iMap V3.0 SP1 or higher is required for the CBA configuration.
Configurations with earlier STEP7, iMap and TIA versions are compatible with later releases.

Distributed Safety:
For failsafe applications you require the option package S7 Distributed Safety V5.4 SP1 or higher.

The firmware update V3.3.12 provides the following corrections:

  • After a CLR instruction, set and reset commands no longer sporadically result in the setting or resetting of bit operands.
  • When monitoring logic operations sequences with an “O” instruction (Or), RLO views no longer change.
  • Connection interruptions with online functions will no longer sporadically result in the defect with Z1=F012.
  • For acyclic data exchange with the SFBs 52 and 53 in case of a high communication load the defect status with Z1=E800 is no longer occasionally triggered, instead the temporary RetVal 80C3 is signaled at the SFC.
  • Time synchronization of the master no longer leads to isolated cases of defects with Z1= F012 or Z1=8392.
  • Following a memory reset request, for example, because a project which does not match the CPU is saved on the MMC, formatting of the MMC through switch operation now functions again as described in the manual.
  • Start-up problems in the case of the parameter assignment "startup for target = actual" with the failsafe modules 4/8F-DI (6ES7 138-4FA05-0AB0) and 4F-DO (6ES7 138-4FB04-0AB0) have been rectified for cases in which the power module does not provide voltage for the modules. 


Update V3.3.11 (6ES7151-7FA21-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
To be able to configure this CPU your require STEP7 V5.5 or higher.
For the CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions are compatible with later releases.

Distributed Safety:
For failsafe applications you require the option package S7 Distributed Safety V5.4 SP1 or higher.

The new firmware version V3.3.11 provides the following corrections:

  • When monitoring blocks online with the calls and path specification of a block already opened for monitoring, the previously occurring defect with Z1=4305 will be prevented and a negative checkback signal generated instead.


Update V3.3.10 (6ES7151-7FA21-0AB0)

The above CPU version contains no new functions.

Information on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For the CBA configuration you require iMap V3.0 +SP1 or higher. Configurations with earlier STEP7 and iMap versions are compatible with later releases.
For failsafe applications you require the option package S7 Distributed Safety V5.4 SP1 or higher.

The new firmware version provides the following corrections:

  • In the case of a message buffer dump with a large number of transmission messages that would lead to an abortion of the message dump by the connection partner, e.g. because of lack of memory space, the connections will no longer get hooked up and a Defect with Z1=98C6 will no longer occur.
  • The retentivity backup in the case of power off/on has been stabilized, so that the previously occuring very sporadic Defect with Z1=F00F no longer occurs.
  • With TIA version V11 the loading of blocks which contain an ANY-Pointer with length 0 will no longer lead to Defect of the CPU with Z1=F012.
  • During online monitoring of several blocks with TIA version V12 the previously occuring Defect with Z1=7141 after the third block is now prevented; instead, a negative checkback will be generated.
  • An abortion of the communication connection during Block Status could previously cause the sporadic Defect with Z1=F004. Connection monitoring has now been improved.
  • Rapid successive calls of the SFB 52 (reading of data records) will no longer cause the sporadic Defect with Z1=E801.
  • Repeated loading of the user program on MMC with a simultaneously open topology display will no longer cause the Defect with Z1=F014.
  • Disturbances on the line during job reception from a connection partner will no longer cause the sporadic Defect with Z1=700A.
  • When calling several SFCs13 "Read Standard Diagnostics" the analog I/Os of correctly connected slaves will no longer supply the incorrect diagnosis "Wire Break".
  • Loading of large F-blocks of > 64KB with TIA version V12 is now possible and no longer leads to a CRC error message.

Update V3.3.8 (6ES7151-7FA21-0AB0)

The above CPU version contains no new functions.

Note on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions can be used with upward compatibility.

For failsafe applications you require the option package S7 Distributed Safety V5.4 SP1 or higher.

Firmware update V3.3.8 provides the following corrections:

  • COS values of very small numbers (>=0 and <3.8518597E-34) are now output correctly with value 1.
  • AUF DB/DI indirect no longer causes sporadic opening of an incorrect DB.
  • In the case of a block upload or download the CPU will no longer sporadically go to Defect with Z1=F01A.
  • Communication abortions while the communications functions are running will no longer sporadically lead to Defect with Z1=F012.
  • In the case of block calls of the SFCs 82..84 with REQ=0 (RET_VAL=7000), BUSY will not be signaled with TRUE anymore.
  • The accuracy of the square root calculation "SQRT" has been improved. 

Update V3.3.7 (6ES7151-7FA21-0AB0)

This firmware version contains the following new features:

  • SFC 109 PROTECT: new mode 12, with which protection level 3 can be activated via user program without password legitimation (even with a password it is now impossible to read/write access the CPU)

see also Product Information at entry ID 61757603

Note on STEP7 dependencies and upward compatibility:
To be able to run this CPU your require STEP7 V5.5 or higher.
For CBA configuration you require iMap V3.0 +SP1 or higher.
Configurations with earlier STEP7 and iMap versions can be used with upward compatibility.

For failsafe applications you require the option package S7 Distributed Safety version V5.4 SP1 or higher.

Firmware update V3.3.7 provides the following corrections:

  • Modules that have run for approx. 500 days will no longer get stuck sporadically or show endlessly running retentively configured timers.
  • To prevent loss of retentivity with event ID 16# 4580 resp. event ID 16# 6523, the MMC connection in the case of power off/on has been optimized.
  • If the SFC 23 DEL_DB is used and a DB does not exist, defect Z1=F833 will no longer occur.
  • In the case of synchronization errors that cause a STOP of the CPU, defect Z1=F004 will no longer occur highly sporadically.
  • The abortion of a block transfer will no longer lead to a sporadic defect Z1=4131.
  • Connections of the CPU to a PLC link device will now be cut completely in the case of a connection abortion.
  • If clock flags are used, the three adjacent flag byte addresses are no longer influenced anymore.
  • Uploading of blocks to programming devices has been performance optimized.
  • The startup characteristics of F modules that have no load voltage upon startup of the CPU, has been improved.
  • If the SFC 12 "D_ACT_DP" is used and a Simocode module is parameterized at the same time when there is a STOP-RUN transition, defect Z1=3303 will no longer occur.
  • Downloading of blocks or projects will no longer cause the cycle time to be constantly increased therafter.


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