Understanding the High-Speed Counter Instructions

High-speed counters count high-speed events that cannot be controlled at CPU scan rates.

HSC0 is an up/down software counter that accepts a single clock input. The counting

direction (up or down) is controlled by your program, using the direction control bit. The

maximum counting frequency of HSC0 is 2 KHz.

HSC1 and HSC2 are versatile hardware counters that can be configured for one of

twelve different modes of operation. The counter modes are listed in Table 10-5. The

maximum counting frequency of HSC1 and HSC2 is dependent on your CPU. See

Appendix A.

Each counter has dedicated inputs for clocks, direction control, reset, and start where these

functions are supported. For the two-phase counters, both clocks may run at their maximum

rates. In quadrature modes, an option is provided to select one time (1x) or four times (4x)

the maximum counting rates. HSC1 and HSC2 are completely independent of each other

and do not affect other high-speed functions. Both counters run at maximum rates without

interfering with one another.

Figure 10-16 shows an example of the initialization of HSC1.