Activating channel drive output via MonAnL faceplate in simulation

Hi
I have installed the PCS7 V8.2 as attachment. As shown in the attached photo.

when block “MonAnL” is simulated from related faceplate and the alarm high is activated, the output of the Channel drive block, which is from the same library, is not activated, while if I use a block such as “And” between blocks “MonAnL” and Channel drive block Then the output of Channel drive block is activated, and if I use the old version Channel drive block (V7), this problem does not exist.

Has anyone encountered this problem and has a solution?

Oreca

Hi DPCS,

Thank you for including the installed software and image of the steps you have taken. That makes it easier to determine the issue.

I think I know what is going on. The channel output drivers have a feature bit (Bit 30) that will determine the output value when a simulation signal is detected. Default setting is 1:

Bit = 0: If process value input has the status 16#60, the output value will be set to the input value.

Bit = 1: If process value input has the status 16#60, the output value will be set to “0”.

So, please set bit 30 to FALSE and see if that solves the issue.

When you place an AND block in between, you are basically elimination the signal status value in the structure, only the "Value" is transferred. In this case, the signal status is set automatically to 16#80, indicating a "good" value. 

PS: I notice in the installed software you have installed the following classic libraries:

- SIMATIC PCS 7 Library V7.1+SP3+Upd2

- SIMATIC PCS 7 Faceplates V7.1+SP3

I suggest you will installed the latest updates for them as this is recommended (Better support for x64 systems and more). The library is not updated anymore (replaced by APL), but at least you are running the latest updates:

- PCS 7 Library: V7.1+SP3+Upd4

- PCS 7 Faceplates: V7.1+SP3+Upd1

See Link under bullet 6 to download them.

Best regards,