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PLCSIM Simulator problem

Created by: make_it_move at: 6/5/2014 4:36 PM (5 Replies)

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6/5/2014 4:36 PM	Rate (0)
make_it_move Posts: 25 Rating: (1)	Hi, I'm starting to learn the TIA portal software tool. I'm using the PLCSIM simulator to run my programs. Now I have this very simple OB1, with two simple networks. See picture TIA1 When I run this in the simulator something strange happens. First all inputs are low. Then I make the And1 and And2 inputs high. I expect the OutAnd to go high. It does. But also the OutRS goes high! When making And1 or And2 low again, both outputs go low. Is this a Bug or am I misunderstanding something here? Attachment TIA1.jpg (89 Downloads)
make_it_move Posts: 25 Rating: (1)	Last edited by: make_it_move at: 6/5/2014 4:38 PM
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6/5/2014 5:16 PM	Rate (0)
Madhava Silver Member Joined: 11/26/2011 Last visit: 6/29/2023 Posts: 508 Rating: (21)	why you are using same Q address on flipflop and in the next network ?????

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6/5/2014 5:48 PM	Rate (0)
dsout Posts: 66 Rating: (5)	The simulator has shown you a bug in your OB. Above the SR block, you should have Q0.0, not Q0.1. This is where the result of the SR is stored. You do not need the assignment (=) block because it is redundant. You might find it useful to monitor the block execution by using the "eye glasses" button the block editor tool bar. I hope that helps. If I'm wrong, post again and I'll try again.
dsout Posts: 66 Rating: (5)
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6/5/2014 6:16 PM	Rate (0)
make_it_move Posts: 25 Rating: (1)	Oeps. I feel stupid I didn't notice that! Thanks. And thanks for suggestion for the eye glass.
make_it_move Posts: 25 Rating: (1)
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6/5/2014 6:17 PM	Rate (0)
billwest Posts: 510 Rating: (117)	Fromm the On-line Help for SR Use the instruction "Set/reset flip-flop" to set or reset the bit of the specified operand, depending on the signal state of the inputs S and R1. If the signal state is "1" at input S and "0" at input R1, the specified operand is set to "1". If the signal state is "0" at input S and "1" at input R1, the specified operand will be reset to "0". Input R1 takes priority over input S. When the signal state is "1" on both inputs S and R1, the signal state of the specified operand is reset to "0". The instruction is not executed if the signal state at the two inputs S and R1 is "0". The signal state of the operand then remains unchanged. The current signal state of the operand is transferred to output Q and can be queried there. 1. Your Operand is "OutAnd". If S and R1 are bothFalse, the instruction is not executed. 2. Your Q is "OutRS" and it is defined as the signal state of the operand. So if S and R1 areFalse and "And1" and "And2" are True. then "OutAnd" is true. If "OutAnd" isTrue, then "OutRS" is True. 3 If R1 is True, the instruction is evaluatedand "OutRS" is False, regardless if "And1" and "And1" are true. Regards, billwest
billwest Posts: 510 Rating: (117)
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6/5/2014 6:24 PM	Rate (0)
dsout Posts: 66 Rating: (5)	Don't worry, mistakes are normal. That's why we have a simulator. :)
dsout Posts: 66 Rating: (5)
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