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1/3/2011 10:27 PM | |
Joined: 9/27/2006 Last visit: 9/10/2024 Posts: 12282 Rating: (2682)
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Hello peter; Could you please explain exactly what you are planning to do? Are you refering to the operationnal limits of the on-board analog inputs of your CPU, or the sampling rate of the A/D chips that handle the conversion to digital levels? In the following document you will find information on analog sampolig rates for the S7-31xC PLCs: SIMATIC S7-300 CPU 31xC and CPU 31x: Technical specifications Measuring principle 31xC CPUs use the measuring principle of actual value encoding. They operate with a sampling rate of 1 kHz. That is, a new value is available at the peripheral input word register once every millisecond and can then be read via the user program (e.g. L PEW). The "previous" value is read again if access times are shorter than 1 ms. So yoiur maximum possible rate of reading analog values should be 2 ms per value (Shannon's theorem of sampling). Hope this helps, Daniel Chartier |
Last edited by: dchartier at: 1/3/2011 10:29 PM |
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