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S7-1200 High speed counters

Created by: MickV at: 8/21/2012 2:08 PM (4 Replies)

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8/21/2012 2:08 PM	Rate (0)
MickV Posts: 6 Rating: (0)	Hi everybody does anyone know how to use a HSC with a "harware gate" ie I1 clock input, pulses to be measured if I2=TRUE AND I3=TRUE. I guess there is no such possibility but maybe there is a tricky way that I cannot imagine.
MickV Posts: 6 Rating: (0)
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8/22/2012 1:01 PM	Rate (0)
Denilson Pegaia Platinum Member Joined: 9/23/2005 Last visit: 1/28/2023 Posts: 4176 Rating: (1323)	Hi, that I know, the S7-1200 HSC doesn't have HW gate. You can, however, to use a HW interruption to read values or to reset the counter - indirectly, you can program something with similar effect.
	Denilson Pegaia Siemens Industry Sector Technical Support
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8/22/2012 2:55 PM	Rate (0)
0_Einstein Diamond Member Joined: 7/7/2010 Last visit: 1/27/2023 Posts: 13080 Rating: (2123)	As for a trick, if you have spare bank of non-relay outputs available, you can run your HSC input into the power feed (1L) of one bank of output modules. Then wire one of thosecontrollable outputs, like Q2.0 (assuming an add-on output module is connected to the main plc) to the HSC input. To disable the HSC count, turn off Q2.0. To enable counting, turn Q2.0 on. I think this is very inefficient. If you use an external SSR, you could use Q1.0 on the main plc to accomplish the same enable/disable and not waste a bank of outputs. I hope this is what you were looking for. I am not familiar with the options available with ET200S remote I/O, but there may be a module that does exactly what you want.
	science guy
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8/22/2012 8:38 PM	Rate (0)
MickV Posts: 6 Rating: (0)	thanks huggy_d1, this seems to be simple and efficient. I will parameterize a HW interrupt with enable inputs I0.2 and I0.3 to reset Q0.1 through which the encoder signal shall be wired to I0.0. Just for the record what is SSR?
MickV Posts: 6 Rating: (0)
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8/22/2012 10:41 PM	Rate (0)
0_Einstein Diamond Member Joined: 7/7/2010 Last visit: 1/27/2023 Posts: 13080 Rating: (2123)	MickV thanks huggy_d1, this seems to be simple and efficient. I will parameterize a HW interrupt with enable inputs I0.2 and I0.3 to reset Q0.1 through which the encoder signal shall be wired to I0.0. Just for the record what is SSR? http://en.wikipedia.org/wiki/Solid-state_relay
	science guy
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