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what is the differnce between the functionality of a failsafe cpu and a normal cpu wich is programmed by failsafe method in LADDER for instance?

Created by: Ayoob.M at: 10/20/2011 9:56 AM (1 Replies)

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10/20/2011 9:56 AM	Rate (0)
Ayoob.M Posts: 13 Rating: (0)	fritz Hello Jasner the TUV certificate is in general the "ultimate" certificate to have for it, but good on you for questioning what is really going on behind the scenes and how does Siemens "get away" with doing CAT4/SIL3 certified safetyin a single F-CPU. The answer is in general quite simple: Through time based redundancy and diversity. What this means is this: You program your safety logic in F-LAD and/or F-FBD. When youhit the compile button, the compiler takes your safety logic andinverts it as well as converts it toa WORD based logic (this gives you diversity). When the Safety program is executed, it willbe executed twice every time its called (without you as a programmer having to "worry" about it). First execution is done on what youprogrammed followed by an execution of the "diversified" (inverted and WORD based) logic that the compiler created for you (this is the "time based redundancy" part). Whenboth executions are done the safety call compares the resultsand "expects" that they will be exactly opposite (and if not shut down the CPU). This is how Siemens is able to achieve TUV certified CAT4/SIL3 rating for a single CPUand it is not only pretty "safe" but also pretty clever in my humble opinion. Attached is a pic to help visualising the above description and it would be nice if Siemens would promote this a bit more in their glossy F-System brochures(it is not a secret but something that is frequently being "questioned" by customers and users alike). Below is additionally a link to an (independent) ARC white paper pdf on Siemens Safety integrated: ARC white paper on Siemens Safety integrated I hope this helps Hello everybody I read this answer from fritz to Jasner about simatic failsafe controllers, the brief description about the mechanism of TUV certified method that siemens uses for its failsafe controllers( witch has special compilers) was undrestandable . As i got, this method is quiet simple and can easily been established in LADDER or FBD for a normal cpu(not a failsafe).Now i want to know that what is the differnce between the functionality of a failsafe cpu and a normal cpu wich is programmed by failsafe method in LADDER for instance? will they have a same safety?
Ayoob.M Posts: 13 Rating: (0)	Last edited by: O_Moderator at: 10/21/2011 10:05 AM new subject after splitting from /tf/WW/en/Posts/36754#top
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12/21/2011 1:10 PM	Rate (0)
fritz Diamond Expert Joined: 10/7/2005 Last visit: 9/20/2024 Posts: 3021 Rating: (1054)	Hello Ayoob.M I hope you haven't given up hope of getting a reply and also that my advise won't come too late. As for your question: Ayoob.M Now i want to know that what is the differnce between the functionality of a failsafe cpu and a normal cpu wich is programmed by failsafe method in LADDER for instance? will they have a same safety? Well, in theory yes, but (and this is a big BUT) it is NOT practical to do so and I fear you neglected to think through the ramifications. Lets' assume for the sake of argument that you would employ a "standard" CPU and "standard" logic to develop your own version of a "timed redundancy and diversity based" safety program. Apart from programming the safetyrelated logic (which you'd have to do in an F-CPU too), you will also have to do the following: 1.) Program (or come up with an automatic compiler based version) the diversified equivalent (e.g. inverted and word based) 2.) Develop a block that takes care of calling both versions (the "timed redundancy" part) and comparing their results and handling a safe shutdown if need be. 3.) Have the above certified by a credible authority. If the above doesn't sound trouble,time and money consuming enough, you will then realise that you can NOT use Profisafe protocol NOR Safety I/O's (a standard CPU doesn't support either). The important thing to remember is that any safety related application MUST take account the wholefollowing safety chain from start to finish: - Sensor selection - Sensor wiring - Input cards - Fieldbus(if applicable, e.g. Profisafe) - Logic evaluation (this small part is what your question relates too) - Fieldbus (if applicable, e.g. Profisafe) - Output cards - Actuator Wiring - Actuatorselection I urgeyou abandon your thought of developing your own "safety logic" in a standard CPU and hope this helps.
	Last edited by: fritz at: 12/21/2011 1:16 PM Cheers fritz The advice and opinion given in this thread is that of the author and does not necessarily reflect the views of I S Systems Pty Limited. To find out how I S Systems can help you with your automation needs please visit www.issystems.com.au.
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