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Help with FC92 Bit Shift Register

Created by: salesharks at: 2/18/2009 4:39 PM (1 Replies)

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2/18/2009 4:39 PM	Rate (0)
salesharks Posts: 16 Rating: (0)	Hi All I am trying to use FC92 in a 313c-2dp cpu. I have inputed the following data A "vac_sw1" = L 0.0 BLD 103 A "reset_sw" = L 0.1 BLD 103 A "OutputA1_PP1" JNB _001 CALL "SHRB" DATA :=L0.0 RESET:=L0.1 S_BIT:=P#DB2.DBX 1.0 N :=W#16#7 _001: A BR = M 55.0 I thought that the shift register worked that if the data was 1 it would input this into S_BIT when vac_sw1 is true. I have specified a 7 bit register under N. When I monitor DB2.DBX1.0 through to DB2.DBX1.6 all 7 bits go high. I thought that they would start to go high one at a time until all 7 bits were high. Only if vac_sw1 is false would you then get a false bit moving along the register or you reset the register. Also if I try to reset the register nothing happens. What have I doine wrong??????
salesharks Posts: 16 Rating: (0)
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2/20/2009 8:00 PM	Rate (0)
jklm Posts: 1742 Rating: (309)	Hello, What I believe is that you shift seven times a bit (which is equal to one, because L0.0 is equal to one).
jklm Posts: 1742 Rating: (309)	Last edited by: edr at: 2/20/2009 8:01 PM
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