Hi everyone!

I have a question about the timers.

I read the topics of different type of timers, but not read answer when exactly S5T# type timers is updated in the cycle of CPU?
I mean when OB1 receive that the timer is with elapsed time? At the begin of cycle or at the end of cycle? Or when the timers Q output rise it issue an kind of interrupt that break the cycle?
I read that this made asynchronously from cycle, but not when exactly is made?

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Split from CPU Timer Instructions - Status of timer relative to scan?.

jacek d

AFAIK in case of S7 at regular interval (every 1 ms in S7-400 and every 10 ms in S7-300 I think) the user program is interrupted and control is returned to the operating system. At this time also the timers are updated.

hi,

the S5-Timer are, like you already mentioned, asynchronus. So they are undepended of the Cycle. 

The userprogram will not be interrupted for updating the timer. The "actualization" is dependend of the time-base the timer has. Have a look in following manual chapter 27.3.2.5:

Programming with STEP 7

the question is when do you access the timer. for example, at the beginn of your cycle the timer is already running. But when you access this timer at the end of the cycle, the time will could be over.

hope this helps,

regards,

mopS04

 the S5-Timer are, like you already mentioned, asynchronus. So they are undepended of the Cycle. 

The userprogram will not be interrupted for updating the timer. The "actualization" is dependend of the time-base the timer has. Have a look in following manual chapter 27.3.2.5:

Programming with STEP 7

the question is when do you access the timer. for example, at the beginn of your cycle the timer is already running. But when you access this timer at the end of the cycle, the time will could be over.

Hi.

Could you please elaborate when and how the timer gets "actualized" ?

jacek d

 Could you please elaborate when and how the timer gets "actualized" ?

hi jacek,

thats the point, why I set it in qoutation mark. The timer is a part of the CPU. Here a quote from CPU 31xC and CPU 31x: Technical specifications:

Timers

Timers are part of CPU system memory. The content of timer cells is automatically updated

by the operating system, asynchronously to the user program. STEP 7 instructions are used

to define the precise function of the timer cell (for example, on-delay) and to initiate their

execution (for example, start).

 hope this helps,

regards,

Hi!

Interesting question!

   I've checked Mr. Berger's book "Automating with Step 7 in LAD and FBD" (300/400 controllers).

   On page 172 he states that the OS updates the timers at fixed intervals based on the time base, independently of the user program. Since timers are updated asynchronously to the program scan, you might get different time status during the scan (start vs end).

Kahl

Hi!

Interesting question!

   I've checked Mr. Berger's book "Automating with Step 7 in LAD and FBD" (300/400 controllers).

   On page 172 he states that the OS updates the timers at fixed intervals based on the time base, independently of the user program. Since timers are updated asynchronously to the program scan, you might get different time status during the scan (start vs end).

 Mr. Berger is a clever man 

ok sorry, 

technical speaking there is no "actualzation". the timer is working alone. you load a s5#time to it and start it. An own part of the CPU is executing it. You can access the state of the timer in the program. Depending on the time base the CPU will "count down" this timer. When you have a timer with the highest time base(10s), the CPU will do this in 10s-steps. you can test it in PLC-SIM with a timer and TW = S5T#9990s. Go online and look how the time is going down. 

regards,

 Hi!

mopS04

.... You can access the state of the timer in the program. .......

 Somebody told me that the S5 timers are hardware timers, while the IEC timers are software timers.

Than the status of the hardware timer can be found somewhere in a processor register. Technically speaking, you cannot access that register straight from the user program, the OS makes that possible, so there is an interrupt kinda thing.

(I am not an STL guy, but as I know, some of the processor registers can be accessed from there, e.g. accumulators).

So I think that both of you are right.

I would like to expand the question and ask the same about the IEC timers, when are they updated in the cycle?