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4/28/2012 2:33 PM | |
Joined: 9/18/2006 Last visit: 9/2/2024 Posts: 591 Rating: (64) |
Hi. May be: 2: An integer multiple of the DQ clock cycle was not entered in p4099[x]. Best regards. |
5/2/2012 4:16 AM | |
Joined: 2/28/2011 Last visit: 7/6/2015 Posts: 3 Rating: (0) |
Dear, How can Icheck the DQ clock cycle? Which parameters? thanks! Luozy |
5/2/2012 6:32 AM | |
Posts: 58 Rating: (19) |
Dear Luo Zhi Yun, Please check TM41 parameter r116[0] and r116[1] for the recommended sampling time. I am afraid that this is a restriction in the V4.5 firmware. (Please refer page 2 of the attached pdf filewhere a similar problem is mentioned for CU310-2). Possible solution mentionedis by settingp4099 index 0, 1 and 3 all to the same value. U can try to set these parameters with value from r116[0]. Regards Ajay Gupta Attachment59427410_SINAMICS_S120_V4_5_restrictions.pdf (171 Downloads) |
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