2/11/2021 8:53 PM | |
Joined: 2/11/2021 Last visit: 5/18/2023 Posts: 1 Rating: (0) |
Can any body guide me a PCS7 logic i have 16 analog parameters and i have to monitors all if any 5/16 Low is it generate a bit? is there any Block available in PCS7? using PCS7 V9.0 CEMAT lib Regards ------------------------------------------------------------------------------------------ |
Last edited by: Jen_Moderator at: 02/12/2021 08:42:25New subject after splitting |
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2/16/2021 6:45 AM | |
Posts: 198 Rating: (60) |
Hello Ameer, As per community guidelines, I will not be able to give the exact implementation of the logic, but I can guide you with some inputs. There is no specific block which can provide a customized logic requirement such as this. Logical engineering will be required with a combination of blocks. There are multiple ways to achieve the desired logic, however, it would easiest to use the APL library blocks Intlck04 and Intlck02 in combination of AND and OR conditions to achieve this. CEMAT has an ANNUNC block which can be used in combination the logical gate blocks to achieve this too. For detailed description of the blocks, you may refer the manual links below: The CEMAT library manual for V9.0 can be found in this link The APL library manual for V9.0 can be found in this link Hope this helps! :) |
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