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S7 414-4H synchronization/download problem

Created by: #EIC# at: 1/16/2016 8:23 AM (12 Replies)

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1/16/2016 8:23 AM	Rate (0)
#EIC# Advanced Member Joined: 5/19/2015 Last visit: 5/31/2024 Posts: 21 Rating: (0)	Dear Experts, I have the following problem regarding S7 414-4H redundant pair: Initially both CPUs had the same configuration and they were running in Master-Slave with no problem. The problem is that some other people did some changes to some FBs and did not load them in the FLASH memory, they just load it in RAM memory (work memory). For consistency and backup purposes I thought is better to have the functions from RAM in the FLASH memory so I did the following: I did an upload of the current program, put the CPU A (which was the reserve CPU) in STOP mode, download the program in FLASH memory and put the CPU A back in RUN. Now the problem is that the CPUs are not synchronizing anymore. The current status of CPUs is: CPU B running in solo mode with the initial configuration, CPU A is in STOP with RAM load memory empty and FLASH load memory also empty (I deleted all the information from RAM and FLASH). If I just simply try to download the complete configuration (the station) in the CPU I receive a bottleneck warning that states I don't have enough memory. If I try to download in the FLASH memory I can download just the Blocks folder and not all the station with all the hardware settings etc. Can you please help me with some information? What is the most important is that the plant is running! In the diagnostic buffer I have this: Reject CONNECT due to configuration change. Thank you very much!
	Last edited by: plc_iec at: 1/16/2016 9:16:29 AM
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1/16/2016 11:25 AM	Rate (0)
MAZENJER Silver Member Joined: 8/31/2013 Last visit: 11/8/2024 Posts: 607 Rating: (41)	It is better for you and your friends in the plant to wait like these troubleshooting issues to shutdown the area which is these s7-400 responsible on it. I think the manufacture of this plant programming the FBs in each PLC the same. Try to compare the similar blocks with other PLC and try to find where is the changes. maybe there some programming faults or some things not logic.
	Warm Regards MAZENJER
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1/16/2016 11:47 AM	Rate (0)
#EIC# Advanced Member Joined: 5/19/2015 Last visit: 5/31/2024 Posts: 21 Rating: (0)	Thank you for the answer, the CPU B is running in solo mode with a good configuration. Some of the fuctions are in EPROM and some are in the RAM. The same was for CPU A. All I want is to have all the logic in FLASH so in case the power goes down the configuration will be loaded back from FLASH. I don't want to loose the functions that are in RAM and I don't want to relay just on batteries. The problem is that after I did the download to FLASH for CPU A the CPUs are not synchronizing because there are differences between the loaded memory of the CPUs. What should I do? Should I download the blocks in CPU A like they are in CPU B, part of them in FLASH and the other part in RAM? I use the uploaded configuration so that I know I have no differences.

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1/18/2016 7:20 AM	Rate (1)
hdhosseini Diamond Expert Joined: 1/28/2009 Last visit: 10/26/2024 Posts: 6852 Rating: (1365)	Dear User , If you are talking about a redundant system consisting of 2 H-CPUs,both flashes should have the same blocks inside.Simply follow the same procedure to copy the sample blocks to the FLASH on other CPU. NOTE: CPUs in a redundant system are master and standby. There is no slave because they have the same right to control the process . I hope this helps, hdhosseini
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1/18/2016 8:56 AM	Rate (0)
#EIC# Advanced Member Joined: 5/19/2015 Last visit: 5/31/2024 Posts: 21 Rating: (0)	Dear hdhosseini, Yes there are two redundant S7 414-4H CPUs. Currently The CPU B is running in solo mode with the good configuration. In this configuration part of the logic FB, FC etc is in FLASH and the other part is in RAM. The CPU A is now in stop and it doesn't sync with CPU B. I erased the RAM and FLASH memories for CPU A. How should I proceed? Should I download in FLASH of CPU A the same blocks that are downloaded in FLASH of CPU B and the rest of the functions should I download them just in RAM like they are in CPU B so that the load memories are indetical in both CPUs? Thank you very much!

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1/18/2016 10:27 AM	Rate (1)
hdhosseini Diamond Expert Joined: 1/28/2009 Last visit: 10/26/2024 Posts: 6852 Rating: (1365)	Hello again, This is a tricky situation . If you are sure that the available blocks in the internal RAM of CPU B (as you mentioned) is the same as the the content of FLASH , you can upload from the working CPU and then transfer it to Flash of CPU in STOP (CPU A).If they are identical , Your CPUs enter the redundant mode again. If you have PG and your process can tolerate half an hour of shut down , just STOP the CPU B and remove the flash -->copy the content with PG and paste it in new flash. If you don't have PG and your process can tolerate half an hour of shut down , upload from working CPU B(STEP 1), just power off the CPU B (while batteries are removed) , power on -->wait-->upload (STEP 2) and copy the blocks coming from the flash into internal RAM to flash of CPU A.You can compare the uploaded version in STEP 1 and in STEP 2 to find out if they are identical. I hope with couple of checks you overcome the problem . I hope this helps, hdhosseini
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1/18/2016 4:44 PM	Rate (0)
#EIC# Advanced Member Joined: 5/19/2015 Last visit: 5/31/2024 Posts: 21 Rating: (0)	Hi hdhosseini, Can I do the following without interrupting the proccess? 1. Upload the project from CPU B (which I know is good) 2, Set the switch of CPU A in STOP 3. Download the project in FLASH of CPU A 4. Set the switch of CPU A in RUN (the CPUs will not sync in this phase and the CPU A will still be in STOP) 5. Switch the primary as CPU A (CPU A will be now in RUN with the configuration from CPU B and CPU B will be in STOP) 6. Reapeat the steps from 2 to 5 for CPU B. All this is because the project is not 100% on the FLASH memory. The are some FB's in RAM that I don't want to loose in case of power failure. Thank you very much for your time!

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1/19/2016 7:48 AM	Rate (0)
hdhosseini Diamond Expert Joined: 1/28/2009 Last visit: 10/26/2024 Posts: 6852 Rating: (1365)	Your selected steps will work perfectly if the content of Flash and internal memory of S7-400 matches.In this case , both CPUs will synchronize in step#4 as you mentioned.Otherwise , in step#5 you need to interrupt the process for a while because you need to change the Master to the standby(STOP) CPU.In this case , when there is a mismatch , STOP the running CPU and STOP-->RUN the CPU in STOP mode. Please ask for more help if the description is not clear.
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1/19/2016 9:36 AM	Rate (0)
#EIC# Advanced Member Joined: 5/19/2015 Last visit: 5/31/2024 Posts: 21 Rating: (0)	Hi hdhosseini, I uploaded a .pdf with the situation. Can you please analize? Thank you very much! Attachment S7 400H CPUs.pdf (757 Downloads)

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1/20/2016 8:55 AM	Rate (1)
hdhosseini Diamond Expert Joined: 1/28/2009 Last visit: 10/26/2024 Posts: 6852 Rating: (1365)	I have read your procedure, but I think CPU A will not stay in RUN status for a long time if synchronization is not successful.In this case it will be in STOP mode and the I think changing the status from STOP-->RUN can not be bumpless and it may require a time based on DP slaves connected (as an example). This is an initial brainstorm , but I will check it in our H test system in my workplace and update if it is sth helpful.
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