11/24/2011 4:31 PM | |
Joined: 9/8/2009 Last visit: 7/17/2023 Posts: 1410 Rating:
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I have made a PID regulator, Traj. planner and simulator. All blocks were tested in PLCSIM (S7-300). The best result showed the use of traj. planner.position ->P-regulator with input limitation + planner.velocity as feedforward. I attached source blocksin SCL Attachment00000001.zip (669 Downloads) |
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