Problems with the meanig Program State Word

Hi Charran,

Format L STW

Description

L STW (instruction L with the address STW) loads ACCU 1 with the contents of the status word. The instruction is executed without regard to, and without affecting, the status bits.

Note For the S7-300 series CPUs, the statement L STW does not load the FC, STA, and OR bits of the status word. Only bits 1, 4, 5, 6, 7, and 8 are loaded into the corresponding bit positions of the low word of accumulator 1.

Status word

BRCC 1CC 0OVOSORSTARLO/FC

Example

STLExplanation
LSTW//Load contents of status word into ACCU 1.

The contents of ACCU 1 after the execution of L STW is:

Bit31-9 8 7 6 5 4 3 2 1 0
Content:0BRCC1CC0OVOSORSTARLO/FC

So when a 'x' is standing somewhere then that status bit is influenced by the command thats directly before it. In this example is the RLO made by the Inputs and this one could be "0" or "1".......

A I 0.0
A I 0.1
= Q 1.0

The first command is the one that makes the RLO (RLO = A I0.0), after that in the RLO is the status from I0.0, with that RLO is the"A I0.1" taken together, which is given a new RLO from the RLO before with A I0.1. Then the first use of the RLO is made with "= Q1.0" where the RLO is set to the output.

RLO = Result ofLogic Operation{or something like that}

This is one bit from the status-register that is used, also are there in the statusregister for jump-instructions several bits reserved to get information on "Equal", "Greater then", "Zero", etc.for all kind of REAL and INT commands.

All those register are in the next handbook to see:
S7-300 Instruction List CPU 31xC, CPU 31x, IM 151-7 CPU, BM 147-1 CPU, BM 147-2 CPU

See especially page 17 where the STATUSWORD is shown.